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Add newline at eof for (system)verilog lexers

Fixes https://github.com/alecthomas/chroma/issues/55
This commit is contained in:
Kaushal Modi 2017-10-09 11:11:35 -04:00
parent 7f66cd3f6e
commit 8f90f6d80a
2 changed files with 2 additions and 0 deletions

View File

@ -11,6 +11,7 @@ var Systemverilog = Register(MustNewLexer(
Aliases: []string{"systemverilog", "sv"},
Filenames: []string{"*.sv", "*.svh"},
MimeTypes: []string{"text/x-systemverilog"},
EnsureNL: true,
},
Rules{
"root": {

View File

@ -11,6 +11,7 @@ var Verilog = Register(MustNewLexer(
Aliases: []string{"verilog", "v"},
Filenames: []string{"*.v"},
MimeTypes: []string{"text/x-verilog"},
EnsureNL: true,
},
Rules{
"root": {