extrasyn: Add highlighters for JSON, Verilog, VHDL. Kindly provided by MRisco, issue #18248. Shorten menu in demo program.

git-svn-id: https://svn.code.sf.net/p/lazarus-ccr/svn@8075 8e941d3f-bd1b-0410-a28a-d453659cc2b4
2021-08-18 21:27:43 +00:00
parent 89d246386d
commit f0bada71d3
23 changed files with 3215 additions and 462 deletions
--- a/components/extrasyn/icons/iconlist.txt
+++ b/components/extrasyn/icons/iconlist.txt
@ -115,3 +115,13 @@ tsynvbscriptsyn_200.png
 tsynvrml97syn.png
 tsynvrml97syn_150.png
 tsynvrml97syn_200.png
+tsynvhdlsyn.png
+tsynvhdlsyn_150.png
+tsynvhdlsyn_200.png
+tsynverilogsyn.png
+tsynverilogsyn_150.png
+tsynverilogsyn_200.png
+tsynjsonsyn.png
+tsynjsonsyn_150.png
+tsynjsonsyn_200.png
+
--- a/components/extrasyn/icons/tsynjsonsyn.png
+++ b/components/extrasyn/icons/tsynjsonsyn.png
--- a/components/extrasyn/icons/tsynjsonsyn_150.png
+++ b/components/extrasyn/icons/tsynjsonsyn_150.png
--- a/components/extrasyn/icons/tsynjsonsyn_200.png
+++ b/components/extrasyn/icons/tsynjsonsyn_200.png
--- a/components/extrasyn/icons/tsynverilogsyn.png
+++ b/components/extrasyn/icons/tsynverilogsyn.png
--- a/components/extrasyn/icons/tsynverilogsyn_150.png
+++ b/components/extrasyn/icons/tsynverilogsyn_150.png
--- a/components/extrasyn/icons/tsynverilogsyn_200.png
+++ b/components/extrasyn/icons/tsynverilogsyn_200.png
--- a/components/extrasyn/icons/tsynvhdlsyn.png
+++ b/components/extrasyn/icons/tsynvhdlsyn.png
--- a/components/extrasyn/icons/tsynvhdlsyn_150.png
+++ b/components/extrasyn/icons/tsynvhdlsyn_150.png
--- a/components/extrasyn/icons/tsynvhdlsyn_200.png
+++ b/components/extrasyn/icons/tsynvhdlsyn_200.png