2015-07-16 09:07:14 +02:00
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/*
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* Loongson SIMD optimized idctdsp
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*
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* Copyright (c) 2015 Loongson Technology Corporation Limited
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* Copyright (c) 2015 Zhou Xiaoyong <zhouxiaoyong@loongson.cn>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "idctdsp_mips.h"
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#include "constants.h"
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2016-10-10 10:09:12 +02:00
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#include "libavutil/mips/mmiutils.h"
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2015-07-16 09:07:14 +02:00
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void ff_put_pixels_clamped_mmi(const int16_t *block,
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uint8_t *av_restrict pixels, ptrdiff_t line_size)
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{
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2016-05-17 13:16:42 +02:00
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double ftmp[8];
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2015-07-16 09:07:14 +02:00
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__asm__ volatile (
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2016-10-10 10:09:12 +02:00
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MMI_LDC1(%[ftmp0], %[block], 0x00)
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MMI_LDC1(%[ftmp1], %[block], 0x08)
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MMI_LDC1(%[ftmp2], %[block], 0x10)
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MMI_LDC1(%[ftmp3], %[block], 0x18)
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MMI_LDC1(%[ftmp4], %[block], 0x20)
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MMI_LDC1(%[ftmp5], %[block], 0x28)
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MMI_LDC1(%[ftmp6], %[block], 0x30)
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MMI_LDC1(%[ftmp7], %[block], 0x38)
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2016-05-17 13:16:42 +02:00
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"packushb %[ftmp0], %[ftmp0], %[ftmp1] \n\t"
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"packushb %[ftmp2], %[ftmp2], %[ftmp3] \n\t"
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"packushb %[ftmp4], %[ftmp4], %[ftmp5] \n\t"
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"packushb %[ftmp6], %[ftmp6], %[ftmp7] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_SDC1(%[ftmp0], %[pixels], 0x00)
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2018-09-05 12:31:05 +02:00
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp2], %[pixels], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp4], %[pixels], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp6], %[pixels], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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2015-07-16 09:07:14 +02:00
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2018-09-05 12:31:05 +02:00
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MMI_LDC1(%[ftmp0], %[block], 0x40)
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MMI_LDC1(%[ftmp1], %[block], 0x48)
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MMI_LDC1(%[ftmp2], %[block], 0x50)
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MMI_LDC1(%[ftmp3], %[block], 0x58)
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MMI_LDC1(%[ftmp4], %[block], 0x60)
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MMI_LDC1(%[ftmp5], %[block], 0x68)
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MMI_LDC1(%[ftmp6], %[block], 0x70)
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MMI_LDC1(%[ftmp7], %[block], 0x78)
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2016-05-17 13:16:42 +02:00
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"packushb %[ftmp0], %[ftmp0], %[ftmp1] \n\t"
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"packushb %[ftmp2], %[ftmp2], %[ftmp3] \n\t"
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"packushb %[ftmp4], %[ftmp4], %[ftmp5] \n\t"
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"packushb %[ftmp6], %[ftmp6], %[ftmp7] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_SDC1(%[ftmp0], %[pixels], 0x00)
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2018-09-05 12:31:05 +02:00
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp2], %[pixels], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp4], %[pixels], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp6], %[pixels], 0x00)
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2016-05-17 13:16:42 +02:00
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
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[ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
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[pixels]"+&r"(pixels)
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: [line_size]"r"((mips_reg)line_size),
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[block]"r"(block)
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: "memory"
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2015-07-16 09:07:14 +02:00
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);
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}
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void ff_put_signed_pixels_clamped_mmi(const int16_t *block,
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uint8_t *av_restrict pixels, ptrdiff_t line_size)
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{
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2016-05-17 13:16:42 +02:00
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double ftmp[5];
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2015-07-16 09:07:14 +02:00
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__asm__ volatile (
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2016-10-10 10:09:12 +02:00
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MMI_LDC1(%[ftmp1], %[block], 0x00)
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MMI_LDC1(%[ftmp0], %[block], 0x08)
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2016-05-17 13:16:42 +02:00
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"packsshb %[ftmp1], %[ftmp1], %[ftmp0] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_LDC1(%[ftmp2], %[block], 0x10)
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MMI_LDC1(%[ftmp0], %[block], 0x18)
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2016-05-17 13:16:42 +02:00
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"packsshb %[ftmp2], %[ftmp2], %[ftmp0] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_LDC1(%[ftmp3], %[block], 0x20)
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MMI_LDC1(%[ftmp0], %[block], 0x28)
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2016-05-17 13:16:42 +02:00
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"packsshb %[ftmp3], %[ftmp3], %[ftmp0] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_LDC1(%[ftmp4], %[block], 0x30)
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MMI_LDC1(%[ftmp0], %[block], 0x38)
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2016-05-17 13:16:42 +02:00
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"packsshb %[ftmp4], %[ftmp4], %[ftmp0] \n\t"
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"paddb %[ftmp1], %[ftmp1], %[ff_pb_80] \n\t"
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"paddb %[ftmp2], %[ftmp2], %[ff_pb_80] \n\t"
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"paddb %[ftmp3], %[ftmp3], %[ff_pb_80] \n\t"
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"paddb %[ftmp4], %[ftmp4], %[ff_pb_80] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_SDC1(%[ftmp1], %[pixels], 0x00)
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2018-09-05 12:31:05 +02:00
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp2], %[pixels], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp3], %[pixels], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp4], %[pixels], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_LDC1(%[ftmp1], %[block], 0x40)
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MMI_LDC1(%[ftmp0], %[block], 0x48)
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2016-05-17 13:16:42 +02:00
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"packsshb %[ftmp1], %[ftmp1], %[ftmp0] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_LDC1(%[ftmp2], %[block], 0x50)
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MMI_LDC1(%[ftmp0], %[block], 0x58)
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2016-05-17 13:16:42 +02:00
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"packsshb %[ftmp2], %[ftmp2], %[ftmp0] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_LDC1(%[ftmp3], %[block], 0x60)
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MMI_LDC1(%[ftmp0], %[block], 0x68)
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2016-05-17 13:16:42 +02:00
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"packsshb %[ftmp3], %[ftmp3], %[ftmp0] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_LDC1(%[ftmp4], %[block], 0x70)
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MMI_LDC1(%[ftmp0], %[block], 0x78)
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2016-05-17 13:16:42 +02:00
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"packsshb %[ftmp4], %[ftmp4], %[ftmp0] \n\t"
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"paddb %[ftmp1], %[ftmp1], %[ff_pb_80] \n\t"
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"paddb %[ftmp2], %[ftmp2], %[ff_pb_80] \n\t"
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"paddb %[ftmp3], %[ftmp3], %[ff_pb_80] \n\t"
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"paddb %[ftmp4], %[ftmp4], %[ff_pb_80] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_SDC1(%[ftmp1], %[pixels], 0x00)
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2018-09-05 12:31:05 +02:00
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp2], %[pixels], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp3], %[pixels], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp4], %[pixels], 0x00)
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2016-05-17 13:16:42 +02:00
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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[ftmp4]"=&f"(ftmp[4]),
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2018-09-05 12:31:05 +02:00
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[pixels]"+&r"(pixels)
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2016-05-17 13:16:42 +02:00
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: [block]"r"(block),
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2018-09-05 12:31:05 +02:00
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[line_size]"r"((mips_reg)line_size),
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2021-06-01 08:22:09 +02:00
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[ff_pb_80]"f"(ff_pb_80.f)
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2016-05-17 13:16:42 +02:00
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: "memory"
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2015-07-16 09:07:14 +02:00
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);
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}
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void ff_add_pixels_clamped_mmi(const int16_t *block,
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uint8_t *av_restrict pixels, ptrdiff_t line_size)
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{
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2018-09-05 12:31:05 +02:00
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double ftmp[9];
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2016-05-17 13:16:42 +02:00
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uint64_t tmp[1];
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2015-07-16 09:07:14 +02:00
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__asm__ volatile (
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2018-09-05 12:31:05 +02:00
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"li %[tmp0], 0x04 \n\t"
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libavcodec/mips: Fix specification of instruction name
1.'xor,or,and' to 'pxor,por,pand'. In the case of operating FPR,
gcc supports both of them, clang only supports the second type.
2.'dsrl,srl' to 'ssrld,ssrlw'. In the case of operating FPR, gcc
supports both of them, clang only supports the second type.
Signed-off-by: Jin Bo <jinbo@loongson.cn>
Reviewed-by: yinshiyou-hf@loongson.cn
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2021-05-28 04:04:39 +02:00
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"pxor %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
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2018-09-05 12:31:05 +02:00
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"1: \n\t"
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MMI_LDC1(%[ftmp5], %[pixels], 0x00)
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_LDC1(%[ftmp6], %[pixels], 0x00)
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PTR_SUBU "%[pixels], %[pixels], %[line_size] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_LDC1(%[ftmp1], %[block], 0x00)
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MMI_LDC1(%[ftmp2], %[block], 0x08)
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MMI_LDC1(%[ftmp3], %[block], 0x10)
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MMI_LDC1(%[ftmp4], %[block], 0x18)
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2018-09-05 12:31:05 +02:00
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PTR_ADDIU "%[block], %[block], 0x20 \n\t"
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"punpckhbh %[ftmp7], %[ftmp5], %[ftmp0] \n\t"
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"punpcklbh %[ftmp5], %[ftmp5], %[ftmp0] \n\t"
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"punpckhbh %[ftmp8], %[ftmp6], %[ftmp0] \n\t"
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"punpcklbh %[ftmp6], %[ftmp6], %[ftmp0] \n\t"
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"paddh %[ftmp1], %[ftmp1], %[ftmp5] \n\t"
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"paddh %[ftmp2], %[ftmp2], %[ftmp7] \n\t"
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"paddh %[ftmp3], %[ftmp3], %[ftmp6] \n\t"
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"paddh %[ftmp4], %[ftmp4], %[ftmp8] \n\t"
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"packushb %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
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"packushb %[ftmp3], %[ftmp3], %[ftmp4] \n\t"
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2016-10-10 10:09:12 +02:00
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MMI_SDC1(%[ftmp1], %[pixels], 0x00)
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2018-09-05 12:31:05 +02:00
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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MMI_SDC1(%[ftmp3], %[pixels], 0x00)
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"addi %[tmp0], %[tmp0], -0x01 \n\t"
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PTR_ADDU "%[pixels], %[pixels], %[line_size] \n\t"
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"bnez %[tmp0], 1b \n\t"
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2016-05-17 13:16:42 +02:00
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
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[ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
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2018-09-05 12:31:05 +02:00
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[ftmp8]"=&f"(ftmp[8]), [tmp0]"=&r"(tmp[0]),
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2016-05-17 13:16:42 +02:00
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[pixels]"+&r"(pixels), [block]"+&r"(block)
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: [line_size]"r"((mips_reg)line_size)
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: "memory"
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2015-07-16 09:07:14 +02:00
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);
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}
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