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FFmpeg/tests/checkasm/arm/checkasm.S

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ArmAsm
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checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
/****************************************************************************
* Assembly testing and benchmarking tool
* Copyright (c) 2015 Martin Storsjo
* Copyright (c) 2015 Janne Grunau
*
* This file is part of Libav.
*
* Libav is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* Libav is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.
*****************************************************************************/
#include "libavutil/arm/asm.S"
cheackasm/arm: remove NEON instructions from checkasm_checked_call_vfp Fixes AS error on non NEON builds introduced in 71a04721145. Also set the fpu directly to vfp in checkasm.S to cause build errors on NEON builds.
2016-07-17 10:43:10 +02:00
/* override fpu so that NEON instructions are rejected */
#if HAVE_VFP
arm: Check for support for the .fpu directive When targeting COFF (windows), clang doesn't support this directive (while binutils supports it for all targets). Signed-off-by: Martin Storsjö <martin@martin.st>
2016-07-18 22:23:50 +02:00
FPU .fpu vfp
cheackasm/arm: remove NEON instructions from checkasm_checked_call_vfp Fixes AS error on non NEON builds introduced in 71a04721145. Also set the fpu directly to vfp in checkasm.S to cause build errors on NEON builds.
2016-07-17 10:43:10 +02:00
ELF .eabi_attribute 10, 0 @ suppress Tag_FP_arch
#endif
checkasm/arm: align the clobber check data properly for ldrd Should fix the SIGBUS in the armv7-linux-clang-3.7 fate target.
2016-07-10 13:23:13 +02:00
const register_init, align=3
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
.quad 0x21f86d66c8ca00ce
.quad 0x75b6ba21077c48ad
.quad 0xed56bb2dcb3c7736
.quad 0x8bda43d3fd1a7e06
.quad 0xb64a9c9e5d318408
.quad 0xdf9a54b303f1d3a3
.quad 0x4a75479abd64e097
.quad 0x249214109d5d1c88
endconst
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
const error_message_fpscr
checkasm: arm: Ignore changes to bits 0-4 and 7 of FPSCR These bits are set by exceptions in NEON instructions. Also print the differing bits when FPSCR is clobbered, and use bic instead of lsl, for clearing the topmost bits. Signed-off-by: Martin Storsjö <martin@martin.st>
2016-07-17 12:31:06 +02:00
.asciz "failed to preserve register FPSCR, changed bits: %x"
checkasm: arm: Don't start new const blocks for each string Each const block needs to be terminated by one endconst invocation so either call endconst after each, or just declare plain labels to the later strings. This fixes errors such as this, on some binutils versions: checkasm.S:38: Error: Macro `endconst' was already defined Signed-off-by: Martin Storsjö <martin@martin.st>
2016-07-16 21:31:02 +02:00
error_message_gpr:
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
.asciz "failed to preserve register r%d"
checkasm: arm: Don't start new const blocks for each string Each const block needs to be terminated by one endconst invocation so either call endconst after each, or just declare plain labels to the later strings. This fixes errors such as this, on some binutils versions: checkasm.S:38: Error: Macro `endconst' was already defined Signed-off-by: Martin Storsjö <martin@martin.st>
2016-07-16 21:31:02 +02:00
error_message_vfp:
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
.asciz "failed to preserve register d%d"
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
endconst
@ max number of args used by any asm function.
#define MAX_ARGS 15
checkasm: arm/aarch64: Fix the amount of space reserved for stack parameters Even if MAX_ARGS - 2 (for arm) or MAX_ARGS - 7 (for aarch64) parameters are passed on the stack to checkasm_checked_call, we actually only need to store MAX_ARGS - 4 (for arm) or MAX_ARGS - 8 (for aarch64) parameters on the stack when calling the tested function. Signed-off-by: Martin Storsjö <martin@martin.st>
2016-09-30 10:49:47 +02:00
#define ARG_STACK 4*(MAX_ARGS - 4)
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
checkasm/arm: preserve the stack alignment checkasm_checked_call The stack used by checkasm_checked_call_vfp was a multiple of 4 when the checked function is called. AAPCS requires a double word (8 byte) aligned stack public interfaces. Since both calls are public interfaces the stack is misaligned when the checked is called. Might fix the SIGBUS error in the armv7-linux-clang-3.7 fate config.
2016-07-12 22:46:43 +02:00
@ align the used stack space to 8 to preserve the stack alignment
#define ARG_STACK_A (((ARG_STACK + pushed + 7) & ~7) - pushed)
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
.macro clobbercheck variant
.equ pushed, 4*9
function checkasm_checked_call_\variant, export=1
push {r4-r11, lr}
.ifc \variant, vfp
vpush {d8-d15}
fmrx r4, FPSCR
push {r4}
.equ pushed, pushed + 16*4 + 4
.endif
movrel r12, register_init
.ifc \variant, vfp
vldm r12, {d8-d15}
.endif
ldm r12, {r4-r11}
checkasm/arm: preserve the stack alignment checkasm_checked_call The stack used by checkasm_checked_call_vfp was a multiple of 4 when the checked function is called. AAPCS requires a double word (8 byte) aligned stack public interfaces. Since both calls are public interfaces the stack is misaligned when the checked is called. Might fix the SIGBUS error in the armv7-linux-clang-3.7 fate config.
2016-07-12 22:46:43 +02:00
sub sp, sp, #ARG_STACK_A
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
.equ pos, 0
checkasm: arm/aarch64: Fix the amount of space reserved for stack parameters Even if MAX_ARGS - 2 (for arm) or MAX_ARGS - 7 (for aarch64) parameters are passed on the stack to checkasm_checked_call, we actually only need to store MAX_ARGS - 4 (for arm) or MAX_ARGS - 8 (for aarch64) parameters on the stack when calling the tested function. Signed-off-by: Martin Storsjö <martin@martin.st>
2016-09-30 10:49:47 +02:00
.rept MAX_ARGS-4
checkasm/arm: preserve the stack alignment checkasm_checked_call The stack used by checkasm_checked_call_vfp was a multiple of 4 when the checked function is called. AAPCS requires a double word (8 byte) aligned stack public interfaces. Since both calls are public interfaces the stack is misaligned when the checked is called. Might fix the SIGBUS error in the armv7-linux-clang-3.7 fate config.
2016-07-12 22:46:43 +02:00
ldr r12, [sp, #ARG_STACK_A + pushed + 8 + pos]
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
str r12, [sp, #pos]
.equ pos, pos + 4
.endr
mov r12, r0
mov r0, r2
mov r1, r3
checkasm/arm: preserve the stack alignment checkasm_checked_call The stack used by checkasm_checked_call_vfp was a multiple of 4 when the checked function is called. AAPCS requires a double word (8 byte) aligned stack public interfaces. Since both calls are public interfaces the stack is misaligned when the checked is called. Might fix the SIGBUS error in the armv7-linux-clang-3.7 fate config.
2016-07-12 22:46:43 +02:00
ldrd r2, r3, [sp, #ARG_STACK_A + pushed]
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
blx r12
checkasm/arm: preserve the stack alignment checkasm_checked_call The stack used by checkasm_checked_call_vfp was a multiple of 4 when the checked function is called. AAPCS requires a double word (8 byte) aligned stack public interfaces. Since both calls are public interfaces the stack is misaligned when the checked is called. Might fix the SIGBUS error in the armv7-linux-clang-3.7 fate config.
2016-07-12 22:46:43 +02:00
add sp, sp, #ARG_STACK_A
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
push {r0, r1}
movrel r12, register_init
.ifc \variant, vfp
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
.macro check_reg_vfp, dreg, offset
cheackasm/arm: remove NEON instructions from checkasm_checked_call_vfp Fixes AS error on non NEON builds introduced in 71a04721145. Also set the fpu directly to vfp in checkasm.S to cause build errors on NEON builds.
2016-07-17 10:43:10 +02:00
ldrd r2, r3, [r12, #8 * (\offset)]
vmov r0, lr, \dreg
eor r2, r2, r0
eor r3, r3, lr
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
orrs r2, r2, r3
bne 4f
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
.endm
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
.irp n, 8, 9, 10, 11, 12, 13, 14, 15
@ keep track of the checked double/SIMD register
mov r1, #\n
check_reg_vfp d\n, \n-8
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
.endr
.purgem check_reg_vfp
checkasm: arm: Ignore changes to bits 0-4 and 7 of FPSCR These bits are set by exceptions in NEON instructions. Also print the differing bits when FPSCR is clobbered, and use bic instead of lsl, for clearing the topmost bits. Signed-off-by: Martin Storsjö <martin@martin.st>
2016-07-17 12:31:06 +02:00
fmrx r1, FPSCR
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
ldr r3, [sp, #8]
checkasm: arm: Ignore changes to bits 0-4 and 7 of FPSCR These bits are set by exceptions in NEON instructions. Also print the differing bits when FPSCR is clobbered, and use bic instead of lsl, for clearing the topmost bits. Signed-off-by: Martin Storsjö <martin@martin.st>
2016-07-17 12:31:06 +02:00
eor r1, r1, r3
@ Ignore changes in bits 0-4 and 7
bic r1, r1, #0x9f
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
@ Ignore changes in the topmost 5 bits
checkasm: arm: Ignore changes to bits 0-4 and 7 of FPSCR These bits are set by exceptions in NEON instructions. Also print the differing bits when FPSCR is clobbered, and use bic instead of lsl, for clearing the topmost bits. Signed-off-by: Martin Storsjö <martin@martin.st>
2016-07-17 12:31:06 +02:00
bics r1, r1, #0xf8000000
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
bne 3f
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
.endif
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
@ keep track of the checked GPR
mov r1, #4
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
.macro check_reg reg1, reg2=
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
ldrd r2, r3, [r12], #8
eors r2, r2, \reg1
bne 2f
add r1, r1, #1
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
.ifnb \reg2
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
eors r3, r3, \reg2
bne 2f
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
.endif
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
add r1, r1, #1
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
.endm
check_reg r4, r5
check_reg r6, r7
@ r9 is a volatile register in the ios ABI
#ifdef __APPLE__
check_reg r8
#else
check_reg r8, r9
#endif
check_reg r10, r11
.purgem check_reg
checkasm: arm: report the first clobbered register in checkasm_checked_call
2016-07-14 23:16:14 +02:00
b 0f
4:
movrel r0, error_message_vfp
b 1f
3:
movrel r0, error_message_fpscr
b 1f
2:
movrel r0, error_message_gpr
1:
checkasm: Check register clobbering on arm Use two separate functions, depending on whether VFP/NEON is available. This is set to require armv5te - it uses blx, which is only available since armv5t, but we don't have a separate configure item for that. (It also uses ldrd, which requires armv5te, but this could be avoided if necessary.) Signed-off-by: Martin Storsjö <martin@martin.st>
2015-12-30 23:46:06 +02:00
blx X(checkasm_fail_func)
0:
pop {r0, r1}
.ifc \variant, vfp
pop {r2}
fmxr FPSCR, r2
vpop {d8-d15}
.endif
pop {r4-r11, pc}
endfunc
.endm
#if HAVE_VFP || HAVE_NEON
clobbercheck vfp
#endif
clobbercheck novfp
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