2013-01-16 04:00:41 +03:00
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;******************************************************************************
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;* Vorbis x86 optimizations
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;* Copyright (C) 2006 Loren Merritt <lorenm@u.washington.edu>
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;*
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2013-01-23 18:59:33 +03:00
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;* This file is part of FFmpeg.
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2013-01-16 04:00:41 +03:00
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;*
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2013-01-23 18:59:33 +03:00
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;* FFmpeg is free software; you can redistribute it and/or
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2013-01-16 04:00:41 +03:00
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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2013-01-23 18:59:33 +03:00
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;* FFmpeg is distributed in the hope that it will be useful,
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2013-01-16 04:00:41 +03:00
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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2013-01-23 18:59:33 +03:00
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;* License along with FFmpeg; if not, write to the Free Software
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2013-01-16 04:00:41 +03:00
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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pdw_80000000: times 4 dd 0x80000000
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SECTION .text
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%if ARCH_X86_32
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INIT_MMX 3dnow
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cglobal vorbis_inverse_coupling, 3, 3, 6, mag, ang, block_size
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pxor m7, m7
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lea magq, [magq+block_sizeq*4]
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lea angq, [angq+block_sizeq*4]
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neg block_sizeq
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.loop:
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mova m0, [magq+block_sizeq*4]
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mova m1, [angq+block_sizeq*4]
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mova m2, m0
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mova m3, m1
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pfcmpge m2, m7 ; m <= 0.0
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pfcmpge m3, m7 ; a <= 0.0
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pslld m2, 31 ; keep only the sign bit
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pxor m1, m2
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mova m4, m3
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pand m3, m1
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pandn m4, m1
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pfadd m3, m0 ; a = m + ((a < 0) & (a ^ sign(m)))
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pfsub m0, m4 ; m = m + ((a > 0) & (a ^ sign(m)))
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mova [angq+block_sizeq*4], m3
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mova [magq+block_sizeq*4], m0
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add block_sizeq, 2
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jl .loop
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femms
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RET
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%endif
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INIT_XMM sse
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cglobal vorbis_inverse_coupling, 3, 3, 6, mag, ang, block_size
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mova m5, [pdw_80000000]
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shl block_sized, 2
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add magq, block_sizeq
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add angq, block_sizeq
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neg block_sizeq
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align 16
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.loop:
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mova m0, [magq+block_sizeq]
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mova m1, [angq+block_sizeq]
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xorps m2, m2
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xorps m3, m3
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cmpleps m2, m0 ; m <= 0.0
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cmpleps m3, m1 ; a <= 0.0
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andps m2, m5 ; keep only the sign bit
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xorps m1, m2
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mova m4, m3
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andps m3, m1
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andnps m4, m1
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addps m3, m0 ; a = m + ((a < 0) & (a ^ sign(m)))
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subps m0, m4 ; m = m + ((a > 0) & (a ^ sign(m)))
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mova [angq+block_sizeq], m3
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mova [magq+block_sizeq], m0
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add block_sizeq, mmsize
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2013-01-16 04:00:41 +03:00
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jl .loop
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RET
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