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lavc/aarch64: port HEVC add_residual NEON
Speedup is fairly small, around 1.5%, but these are fairly simple. Signed-off-by: Josh Dekker <josh@itanimul.li>
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@ -36,6 +36,196 @@ const trans, align=4
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.short 31, 22, 13, 4
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endconst
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.macro clip10 in1, in2, c1, c2
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smax \in1, \in1, \c1
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smax \in2, \in2, \c1
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smin \in1, \in1, \c2
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smin \in2, \in2, \c2
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.endm
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function ff_hevc_add_residual_4x4_8_neon, export=1
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ld1 {v0.8h-v1.8h}, [x1]
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ld1 {v2.s}[0], [x0], x2
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ld1 {v2.s}[1], [x0], x2
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ld1 {v2.s}[2], [x0], x2
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ld1 {v2.s}[3], [x0], x2
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sub x0, x0, x2, lsl #2
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uxtl v6.8h, v2.8b
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uxtl2 v7.8h, v2.16b
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sqadd v0.8h, v0.8h, v6.8h
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sqadd v1.8h, v1.8h, v7.8h
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sqxtun v0.8b, v0.8h
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sqxtun2 v0.16b, v1.8h
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st1 {v0.s}[0], [x0], x2
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st1 {v0.s}[1], [x0], x2
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st1 {v0.s}[2], [x0], x2
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st1 {v0.s}[3], [x0], x2
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ret
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endfunc
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function ff_hevc_add_residual_4x4_10_neon, export=1
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mov x12, x0
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ld1 {v0.8h-v1.8h}, [x1]
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ld1 {v2.d}[0], [x12], x2
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ld1 {v2.d}[1], [x12], x2
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ld1 {v3.d}[0], [x12], x2
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sqadd v0.8h, v0.8h, v2.8h
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ld1 {v3.d}[1], [x12], x2
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movi v4.8h, #0
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sqadd v1.8h, v1.8h, v3.8h
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mvni v5.8h, #0xFC, lsl #8 // movi #0x3FF
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clip10 v0.8h, v1.8h, v4.8h, v5.8h
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st1 {v0.d}[0], [x0], x2
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st1 {v0.d}[1], [x0], x2
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st1 {v1.d}[0], [x0], x2
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st1 {v1.d}[1], [x0], x2
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ret
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endfunc
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function ff_hevc_add_residual_8x8_8_neon, export=1
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add x12, x0, x2
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add x2, x2, x2
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mov x3, #8
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1: subs x3, x3, #2
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ld1 {v2.d}[0], [x0]
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ld1 {v2.d}[1], [x12]
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uxtl v3.8h, v2.8b
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ld1 {v0.8h-v1.8h}, [x1], #32
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uxtl2 v2.8h, v2.16b
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sqadd v0.8h, v0.8h, v3.8h
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sqadd v1.8h, v1.8h, v2.8h
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sqxtun v0.8b, v0.8h
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sqxtun2 v0.16b, v1.8h
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st1 {v0.d}[0], [x0], x2
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st1 {v0.d}[1], [x12], x2
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bne 1b
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ret
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endfunc
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function ff_hevc_add_residual_8x8_10_neon, export=1
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add x12, x0, x2
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add x2, x2, x2
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mov x3, #8
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movi v4.8h, #0
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mvni v5.8h, #0xFC, lsl #8 // movi #0x3FF
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1: subs x3, x3, #2
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ld1 {v0.8h-v1.8h}, [x1], #32
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ld1 {v2.8h}, [x0]
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sqadd v0.8h, v0.8h, v2.8h
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ld1 {v3.8h}, [x12]
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sqadd v1.8h, v1.8h, v3.8h
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clip10 v0.8h, v1.8h, v4.8h, v5.8h
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st1 {v0.8h}, [x0], x2
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st1 {v1.8h}, [x12], x2
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bne 1b
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ret
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endfunc
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function ff_hevc_add_residual_16x16_8_neon, export=1
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mov x3, #16
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add x12, x0, x2
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add x2, x2, x2
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1: subs x3, x3, #2
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ld1 {v16.16b}, [x0]
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ld1 {v0.8h-v3.8h}, [x1], #64
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ld1 {v19.16b}, [x12]
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uxtl v17.8h, v16.8b
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uxtl2 v18.8h, v16.16b
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uxtl v20.8h, v19.8b
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uxtl2 v21.8h, v19.16b
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sqadd v0.8h, v0.8h, v17.8h
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sqadd v1.8h, v1.8h, v18.8h
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sqadd v2.8h, v2.8h, v20.8h
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sqadd v3.8h, v3.8h, v21.8h
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sqxtun v0.8b, v0.8h
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sqxtun2 v0.16b, v1.8h
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sqxtun v1.8b, v2.8h
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sqxtun2 v1.16b, v3.8h
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st1 {v0.16b}, [x0], x2
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st1 {v1.16b}, [x12], x2
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bne 1b
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ret
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endfunc
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function ff_hevc_add_residual_16x16_10_neon, export=1
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mov x3, #16
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movi v20.8h, #0
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mvni v21.8h, #0xFC, lsl #8 // movi #0x3FF
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add x12, x0, x2
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add x2, x2, x2
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1: subs x3, x3, #2
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ld1 {v16.8h-v17.8h}, [x0]
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ld1 {v0.8h-v3.8h}, [x1], #64
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sqadd v0.8h, v0.8h, v16.8h
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ld1 {v18.8h-v19.8h}, [x12]
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sqadd v1.8h, v1.8h, v17.8h
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sqadd v2.8h, v2.8h, v18.8h
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sqadd v3.8h, v3.8h, v19.8h
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clip10 v0.8h, v1.8h, v20.8h, v21.8h
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clip10 v2.8h, v3.8h, v20.8h, v21.8h
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st1 {v0.8h-v1.8h}, [x0], x2
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st1 {v2.8h-v3.8h}, [x12], x2
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bne 1b
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ret
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endfunc
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function ff_hevc_add_residual_32x32_8_neon, export=1
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add x12, x0, x2
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add x2, x2, x2
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mov x3, #32
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1: subs x3, x3, #2
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ld1 {v20.16b, v21.16b}, [x0]
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uxtl v16.8h, v20.8b
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uxtl2 v17.8h, v20.16b
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ld1 {v22.16b, v23.16b}, [x12]
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uxtl v18.8h, v21.8b
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uxtl2 v19.8h, v21.16b
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uxtl v20.8h, v22.8b
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ld1 {v0.8h-v3.8h}, [x1], #64
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ld1 {v4.8h-v7.8h}, [x1], #64
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uxtl2 v21.8h, v22.16b
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uxtl v22.8h, v23.8b
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uxtl2 v23.8h, v23.16b
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sqadd v0.8h, v0.8h, v16.8h
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sqadd v1.8h, v1.8h, v17.8h
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sqadd v2.8h, v2.8h, v18.8h
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sqadd v3.8h, v3.8h, v19.8h
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sqadd v4.8h, v4.8h, v20.8h
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sqadd v5.8h, v5.8h, v21.8h
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sqadd v6.8h, v6.8h, v22.8h
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sqadd v7.8h, v7.8h, v23.8h
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sqxtun v0.8b, v0.8h
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sqxtun2 v0.16b, v1.8h
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sqxtun v1.8b, v2.8h
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sqxtun2 v1.16b, v3.8h
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sqxtun v2.8b, v4.8h
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sqxtun2 v2.16b, v5.8h
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st1 {v0.16b, v1.16b}, [x0], x2
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sqxtun v3.8b, v6.8h
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sqxtun2 v3.16b, v7.8h
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st1 {v2.16b, v3.16b}, [x12], x2
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bne 1b
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ret
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endfunc
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function ff_hevc_add_residual_32x32_10_neon, export=1
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mov x3, #32
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movi v20.8h, #0
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mvni v21.8h, #0xFC, lsl #8 // movi #0x3FF
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1: subs x3, x3, #1
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ld1 {v0.8h-v3.8h}, [x1], #64
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ld1 {v16.8h-v19.8h}, [x0]
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sqadd v0.8h, v0.8h, v16.8h
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sqadd v1.8h, v1.8h, v17.8h
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sqadd v2.8h, v2.8h, v18.8h
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sqadd v3.8h, v3.8h, v19.8h
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clip10 v0.8h, v1.8h, v20.8h, v21.8h
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clip10 v2.8h, v3.8h, v20.8h, v21.8h
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st1 {v0.8h-v3.8h}, [x0], x2
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bne 1b
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ret
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endfunc
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.macro sum_sub out, in, c, op, p
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.ifc \op, +
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smlal\p \out, \in, \c
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@ -25,6 +25,22 @@
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#include "libavutil/aarch64/cpu.h"
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#include "libavcodec/hevcdsp.h"
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void ff_hevc_add_residual_4x4_8_neon(uint8_t *_dst, int16_t *coeffs,
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ptrdiff_t stride);
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void ff_hevc_add_residual_4x4_10_neon(uint8_t *_dst, int16_t *coeffs,
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ptrdiff_t stride);
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void ff_hevc_add_residual_8x8_8_neon(uint8_t *_dst, int16_t *coeffs,
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ptrdiff_t stride);
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void ff_hevc_add_residual_8x8_10_neon(uint8_t *_dst, int16_t *coeffs,
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ptrdiff_t stride);
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void ff_hevc_add_residual_16x16_8_neon(uint8_t *_dst, int16_t *coeffs,
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ptrdiff_t stride);
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void ff_hevc_add_residual_16x16_10_neon(uint8_t *_dst, int16_t *coeffs,
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ptrdiff_t stride);
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void ff_hevc_add_residual_32x32_8_neon(uint8_t *_dst, int16_t *coeffs,
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ptrdiff_t stride);
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void ff_hevc_add_residual_32x32_10_neon(uint8_t *_dst, int16_t *coeffs,
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ptrdiff_t stride);
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void ff_hevc_idct_8x8_8_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_8x8_10_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_16x16_8_neon(int16_t *coeffs, int col_limit);
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@ -35,10 +51,18 @@ av_cold void ff_hevc_dsp_init_aarch64(HEVCDSPContext *c, const int bit_depth)
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if (!have_neon(av_get_cpu_flags())) return;
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if (bit_depth == 8) {
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c->add_residual[0] = ff_hevc_add_residual_4x4_8_neon;
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c->add_residual[1] = ff_hevc_add_residual_8x8_8_neon;
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c->add_residual[2] = ff_hevc_add_residual_16x16_8_neon;
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c->add_residual[3] = ff_hevc_add_residual_32x32_8_neon;
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c->idct[1] = ff_hevc_idct_8x8_8_neon;
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c->idct[2] = ff_hevc_idct_16x16_8_neon;
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}
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if (bit_depth == 10) {
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c->add_residual[0] = ff_hevc_add_residual_4x4_10_neon;
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c->add_residual[1] = ff_hevc_add_residual_8x8_10_neon;
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c->add_residual[2] = ff_hevc_add_residual_16x16_10_neon;
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c->add_residual[3] = ff_hevc_add_residual_32x32_10_neon;
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c->idct[1] = ff_hevc_idct_8x8_10_neon;
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c->idct[2] = ff_hevc_idct_16x16_10_neon;
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}
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