1
0
mirror of https://github.com/FFmpeg/FFmpeg.git synced 2025-08-10 06:10:52 +02:00

avcodec/x86/hevc_mc: add qpel_h64_8_avx512icl

ff_hevc_put_hevc_qpel_h64_8_sse4       56782981
ff_hevc_put_hevc_qpel_h64_8_avx2       40097816
ff_hevc_put_hevc_qpel_h64_8_avx512icl  25488576

Reviewed-by: Henrik Gramner <henrik@gramner.com>
Signed-off-by: Wu Jianhua <jianhua.wu@intel.com>
This commit is contained in:
Wu Jianhua
2022-03-11 15:52:13 +08:00
committed by Haihao Xiang
parent 68437bf169
commit 037fa0437d
3 changed files with 11 additions and 1 deletions

View File

@@ -92,6 +92,7 @@ QPEL_TABLE 8, 1, b, avx512icl_h
QPEL_TABLE 8, 1, d, avx512icl_v QPEL_TABLE 8, 1, d, avx512icl_v
QPEL_TABLE 16, 1, b, avx512icl_h QPEL_TABLE 16, 1, b, avx512icl_h
QPEL_TABLE 32, 1, b, avx512icl_h QPEL_TABLE 32, 1, b, avx512icl_h
QPEL_TABLE 64, 1, b, avx512icl_h
pb_qpel_shuffle_index: db 0, 1, 2, 3 pb_qpel_shuffle_index: db 0, 1, 2, 3
db 1, 2, 3, 4 db 1, 2, 3, 4
@@ -1767,9 +1768,15 @@ cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 8, dst, src, srcstride, height, mx, tmp
%else %else
vpmovdw [dstq], m6 vpmovdw [dstq], m6
%endif %endif
%if %1 == 32 %if %1 > 16
QPEL_H_LOAD_COMPUTE 7, src, 16 QPEL_H_LOAD_COMPUTE 7, src, 16
vpmovdw [dstq + 32], m7 vpmovdw [dstq + 32], m7
%endif
%if %1 > 32
QPEL_H_LOAD_COMPUTE 6, src, 32
QPEL_H_LOAD_COMPUTE 7, src, 48
vpmovdw [dstq + 64], m6
vpmovdw [dstq + 96], m7
%endif %endif
LOOP_END dst, src, srcstride LOOP_END dst, src, srcstride
RET RET
@@ -1848,6 +1855,7 @@ HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 8, 8
INIT_ZMM avx512icl INIT_ZMM avx512icl
HEVC_PUT_HEVC_QPEL_AVX512ICL 16, 8 HEVC_PUT_HEVC_QPEL_AVX512ICL 16, 8
HEVC_PUT_HEVC_QPEL_AVX512ICL 32, 8 HEVC_PUT_HEVC_QPEL_AVX512ICL 32, 8
HEVC_PUT_HEVC_QPEL_AVX512ICL 64, 8
%endif %endif
%endif %endif

View File

@@ -237,6 +237,7 @@ void ff_hevc_put_hevc_qpel_h4_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t
void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width); void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h16_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width); void ff_hevc_put_hevc_qpel_h16_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h32_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width); void ff_hevc_put_hevc_qpel_h32_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h64_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width); void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
/////////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////////

View File

@@ -883,6 +883,7 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl; c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl;
c->put_hevc_qpel[5][0][1] = ff_hevc_put_hevc_qpel_h16_8_avx512icl; c->put_hevc_qpel[5][0][1] = ff_hevc_put_hevc_qpel_h16_8_avx512icl;
c->put_hevc_qpel[7][0][1] = ff_hevc_put_hevc_qpel_h32_8_avx512icl; c->put_hevc_qpel[7][0][1] = ff_hevc_put_hevc_qpel_h32_8_avx512icl;
c->put_hevc_qpel[9][0][1] = ff_hevc_put_hevc_qpel_h64_8_avx512icl;
c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl; c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl;
} }
} else if (bit_depth == 10) { } else if (bit_depth == 10) {