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x86/hevcdsp: add ff_hevc_sao_edge_filter_8_{ssse3,avx2}
Original x86 intrinsics code and initial yasm port by Pierre-Edouard Lepere. Refactoring and optimizations by James Almer. Benchmarks of BQTerrace_1920x1080_60_qp22.bin with an Intel Core i5-4200U Width 32 158583 decicycles in edge, sao_edge_filter_8 runs, 0 skips 5205 decicycles in ff_hevc_sao_edge_filter_32_8_ssse3, 32767 runs, 1 skips 2942 decicycles in ff_hevc_sao_edge_filter_32_8_avx2, 32767 runs, 1 skips Width 64 705639 decicycles in sao_edge_filter_8, 262144 runs, 0 skips 19224 decicycles in ff_hevc_sao_edge_filter_64_8_ssse3, 262111 runs, 33 skips 10433 decicycles in ff_hevc_sao_edge_filter_64_8_avx2, 262115 runs, 29 skips Signed-off-by: James Almer <jamrial@gmail.com>
This commit is contained in:
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1f1c7c8a57
commit
042c1159fc
@ -246,7 +246,7 @@ static void restore_tqb_pixels(HEVCContext *s,
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static void sao_filter_CTB(HEVCContext *s, int x, int y)
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static void sao_filter_CTB(HEVCContext *s, int x, int y)
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{
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{
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static const uint8_t band_tab[8] = { 0, 1, 2, 2, 3, 3, 4, 4 };
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static const uint8_t sao_tab[8] = { 0, 1, 2, 2, 3, 3, 4, 4 };
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HEVCLocalContext *lc = s->HEVClc;
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HEVCLocalContext *lc = s->HEVClc;
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int c_idx;
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int c_idx;
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int edges[4]; // 0 left 1 top 2 right 3 bottom
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int edges[4]; // 0 left 1 top 2 right 3 bottom
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@ -312,7 +312,7 @@ static void sao_filter_CTB(HEVCContext *s, int x, int y)
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int ctb_size_v = (1 << (s->sps->log2_ctb_size)) >> s->sps->vshift[c_idx];
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int ctb_size_v = (1 << (s->sps->log2_ctb_size)) >> s->sps->vshift[c_idx];
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int width = FFMIN(ctb_size_h, (s->sps->width >> s->sps->hshift[c_idx]) - x0);
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int width = FFMIN(ctb_size_h, (s->sps->width >> s->sps->hshift[c_idx]) - x0);
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int height = FFMIN(ctb_size_v, (s->sps->height >> s->sps->vshift[c_idx]) - y0);
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int height = FFMIN(ctb_size_v, (s->sps->height >> s->sps->vshift[c_idx]) - y0);
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int tab = band_tab[(FFALIGN(width, 8) >> 3) - 1];
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int tab = sao_tab[(FFALIGN(width, 8) >> 3) - 1];
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uint8_t *src = &s->frame->data[c_idx][y0 * stride_src + (x0 << s->sps->pixel_shift)];
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uint8_t *src = &s->frame->data[c_idx][y0 * stride_src + (x0 << s->sps->pixel_shift)];
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int stride_dst;
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int stride_dst;
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uint8_t *dst;
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uint8_t *dst;
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@ -427,8 +427,8 @@ static void sao_filter_CTB(HEVCContext *s, int x, int y)
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copy_CTB_to_hv(s, src, stride_src, x0, y0, width, height, c_idx,
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copy_CTB_to_hv(s, src, stride_src, x0, y0, width, height, c_idx,
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x_ctb, y_ctb);
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x_ctb, y_ctb);
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s->hevcdsp.sao_edge_filter(src, dst, stride_src, sao->offset_val[c_idx],
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s->hevcdsp.sao_edge_filter[tab](src, dst, stride_src, sao->offset_val[c_idx],
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sao->eo_class[c_idx], width, height);
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sao->eo_class[c_idx], width, height);
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s->hevcdsp.sao_edge_restore[restore](src, dst,
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s->hevcdsp.sao_edge_restore[restore](src, dst,
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stride_src, stride_dst,
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stride_src, stride_dst,
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sao,
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sao,
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@ -217,7 +217,11 @@ void ff_hevc_dsp_init(HEVCDSPContext *hevcdsp, int bit_depth)
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hevcdsp->sao_band_filter[2] = \
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hevcdsp->sao_band_filter[2] = \
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hevcdsp->sao_band_filter[3] = \
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hevcdsp->sao_band_filter[3] = \
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hevcdsp->sao_band_filter[4] = FUNC(sao_band_filter_0, depth); \
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hevcdsp->sao_band_filter[4] = FUNC(sao_band_filter_0, depth); \
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hevcdsp->sao_edge_filter = FUNC(sao_edge_filter, depth); \
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hevcdsp->sao_edge_filter[0] = \
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hevcdsp->sao_edge_filter[1] = \
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hevcdsp->sao_edge_filter[2] = \
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hevcdsp->sao_edge_filter[3] = \
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hevcdsp->sao_edge_filter[4] = FUNC(sao_edge_filter, depth); \
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hevcdsp->sao_edge_restore[0] = FUNC(sao_edge_restore_0, depth); \
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hevcdsp->sao_edge_restore[0] = FUNC(sao_edge_restore_0, depth); \
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hevcdsp->sao_edge_restore[1] = FUNC(sao_edge_restore_1, depth); \
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hevcdsp->sao_edge_restore[1] = FUNC(sao_edge_restore_1, depth); \
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\
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\
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@ -62,8 +62,8 @@ typedef struct HEVCDSPContext {
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int16_t *sao_offset_val, int sao_left_class, int width, int height);
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int16_t *sao_offset_val, int sao_left_class, int width, int height);
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/* implicit stride_src parameter has value of 2 * MAX_PB_SIZE + FF_INPUT_BUFFER_PADDING_SIZE */
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/* implicit stride_src parameter has value of 2 * MAX_PB_SIZE + FF_INPUT_BUFFER_PADDING_SIZE */
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void (*sao_edge_filter)(uint8_t *_dst, uint8_t *_src, ptrdiff_t stride_dst, int16_t *sao_offset_val,
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void (*sao_edge_filter[5])(uint8_t *_dst /* align 16 */, uint8_t *_src /* align 32 */, ptrdiff_t stride_dst,
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int sao_eo_class, int width, int height);
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int16_t *sao_offset_val, int sao_eo_class, int width, int height);
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void (*sao_edge_restore[2])(uint8_t *_dst, uint8_t *_src, ptrdiff_t _stride_dst, ptrdiff_t _stride_src,
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void (*sao_edge_restore[2])(uint8_t *_dst, uint8_t *_src, ptrdiff_t _stride_dst, ptrdiff_t _stride_src,
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struct SAOParams *sao, int *borders, int _width, int _height, int c_idx,
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struct SAOParams *sao, int *borders, int _width, int _height, int c_idx,
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@ -23,14 +23,25 @@
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%include "libavutil/x86/x86util.asm"
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%include "libavutil/x86/x86util.asm"
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%if ARCH_X86_64
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SECTION_RODATA 32
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SECTION_RODATA 32
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pw_mask10: times 16 dw 0x03FF
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pw_mask10: times 16 dw 0x03FF
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pw_mask12: times 16 dw 0x0FFF
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pw_mask12: times 16 dw 0x0FFF
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pb_2: times 32 db 2
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pb_edge_shuffle: times 2 db 1, 2, 0, 3, 4, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
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pb_eo: db -1, 0, 1, 0, 0, -1, 0, 1, -1, -1, 1, 1, 1, -1, -1, 1
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cextern pb_1
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SECTION_TEXT
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SECTION_TEXT
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%define MAX_PB_SIZE 64
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%define PADDING_SIZE 32 ; FF_INPUT_BUFFER_PADDING_SIZE
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;******************************************************************************
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;SAO Band Filter
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;******************************************************************************
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%if ARCH_X86_64
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%macro HEVC_SAO_BAND_FILTER_INIT 1
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%macro HEVC_SAO_BAND_FILTER_INIT 1
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and leftq, 31
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and leftq, 31
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movd xm0, leftd
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movd xm0, leftd
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@ -239,3 +250,161 @@ HEVC_SAO_BAND_FILTER_16 12, 48, 1
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HEVC_SAO_BAND_FILTER_16 12, 64, 2
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HEVC_SAO_BAND_FILTER_16 12, 64, 2
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%endif
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%endif
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%endif
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%endif
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;******************************************************************************
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;SAO Edge Filter
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;******************************************************************************
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%define EDGE_SRCSTRIDE 2 * MAX_PB_SIZE + PADDING_SIZE
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%macro HEVC_SAO_EDGE_FILTER_COMPUTE_8 1
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pminub m4, m1, m2
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pminub m5, m1, m3
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pcmpeqb m2, m4
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pcmpeqb m3, m5
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pcmpeqb m4, m1
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pcmpeqb m5, m1
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psubb m4, m2
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psubb m5, m3
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paddb m4, m6
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paddb m4, m5
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pshufb m2, m0, m4
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%if %1 > 8
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punpckhbw m5, m7, m1
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punpckhbw m4, m2, m7
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punpcklbw m3, m7, m1
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punpcklbw m2, m7
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pmaddubsw m5, m4
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pmaddubsw m3, m2
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packuswb m3, m5
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%else
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punpcklbw m3, m7, m1
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punpcklbw m2, m7
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pmaddubsw m3, m2
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packuswb m3, m3
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%endif
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%endmacro
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;void ff_hevc_sao_edge_filter_<width>_8_<opt>(uint8_t *_dst, uint8_t *_src, ptrdiff_t stride_dst, int16_t *sao_offset_val,
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; int eo, int width, int height);
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%macro HEVC_SAO_EDGE_FILTER_8 2-3
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%if WIN64
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cglobal hevc_sao_edge_filter_%1_8, 4, 8, 8, dst, src, dststride, offset, a_stride, b_stride, height, tmp
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%define eoq heightq
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movsxd eoq, dword r4m
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movsx a_strideq, byte [pb_eo+eoq*4+1]
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movsx b_strideq, byte [pb_eo+eoq*4+3]
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imul a_strideq, EDGE_SRCSTRIDE
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imul b_strideq, EDGE_SRCSTRIDE
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movsx tmpq, byte [pb_eo+eoq*4]
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add a_strideq, tmpq
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movsx tmpq, byte [pb_eo+eoq*4+2]
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add b_strideq, tmpq
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mov heightd, r6m
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%elif ARCH_X86_64
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cglobal hevc_sao_edge_filter_%1_8, 5, 9, 8, dst, src, dststride, offset, eo, a_stride, b_stride, height, tmp
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%define tmp2q heightq
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movsxd eoq, eod
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lea tmp2q, [pb_eo]
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movsx a_strideq, byte [tmp2q+eoq*4+1]
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movsx b_strideq, byte [tmp2q+eoq*4+3]
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imul a_strideq, EDGE_SRCSTRIDE
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imul b_strideq, EDGE_SRCSTRIDE
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movsx tmpq, byte [tmp2q+eoq*4]
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add a_strideq, tmpq
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movsx tmpq, byte [tmp2q+eoq*4+2]
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add b_strideq, tmpq
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mov heightd, r6m
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%else ; ARCH_X86_32
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cglobal hevc_sao_edge_filter_%1_8, 1, 6, 8, dst, src, dststride, a_stride, b_stride, height
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%define eoq srcq
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%define tmpq heightq
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%define tmp2q dststrideq
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%define offsetq heightq
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mov eoq, r4m
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lea tmp2q, [pb_eo]
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movsx a_strideq, byte [tmp2q+eoq*4+1]
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movsx b_strideq, byte [tmp2q+eoq*4+3]
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imul a_strideq, EDGE_SRCSTRIDE
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imul b_strideq, EDGE_SRCSTRIDE
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movsx tmpq, byte [tmp2q+eoq*4]
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add a_strideq, tmpq
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movsx tmpq, byte [tmp2q+eoq*4+2]
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add b_strideq, tmpq
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mov srcq, srcm
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mov offsetq, r3m
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mov dststrideq, dststridem
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%endif ; ARCH
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%if mmsize > 16
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vbroadcasti128 m0, [offsetq]
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%else
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movu m0, [offsetq]
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%endif
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mova m1, [pb_edge_shuffle]
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packsswb m0, m0
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mova m7, [pb_1]
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pshufb m0, m1
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mova m6, [pb_2]
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%if ARCH_X86_32
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mov heightd, r6m
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%endif
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align 16
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.loop:
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%if %1 == 8
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movq m1, [srcq]
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movq m2, [srcq + a_strideq]
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movq m3, [srcq + b_strideq]
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HEVC_SAO_EDGE_FILTER_COMPUTE_8 %1
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movq [dstq], m3
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%endif
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%assign i 0
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%rep %2
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mova m1, [srcq + i]
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movu m2, [srcq + a_strideq + i]
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movu m3, [srcq + b_strideq + i]
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HEVC_SAO_EDGE_FILTER_COMPUTE_8 %1
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mov%3 [dstq + i], m3
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%assign i i+mmsize
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%endrep
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%if %1 == 48
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INIT_XMM cpuname
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mova m1, [srcq + i]
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movu m2, [srcq + a_strideq + i]
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movu m3, [srcq + b_strideq + i]
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HEVC_SAO_EDGE_FILTER_COMPUTE_8 %1
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mova [dstq + i], m3
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%if cpuflag(avx2)
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INIT_YMM cpuname
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%endif
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%endif
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add dstq, dststrideq
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add srcq, EDGE_SRCSTRIDE
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dec heightd
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jg .loop
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RET
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%endmacro
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INIT_XMM ssse3
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HEVC_SAO_EDGE_FILTER_8 8, 0
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HEVC_SAO_EDGE_FILTER_8 16, 1, a
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HEVC_SAO_EDGE_FILTER_8 32, 2, a
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HEVC_SAO_EDGE_FILTER_8 48, 2, a
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HEVC_SAO_EDGE_FILTER_8 64, 4, a
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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HEVC_SAO_EDGE_FILTER_8 32, 1, a
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HEVC_SAO_EDGE_FILTER_8 48, 1, u
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HEVC_SAO_EDGE_FILTER_8 64, 2, a
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%endif
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@ -500,6 +500,37 @@ SAO_BAND_FILTER_FUNCS(8, avx2);
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SAO_BAND_FILTER_FUNCS(10, avx2);
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SAO_BAND_FILTER_FUNCS(10, avx2);
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SAO_BAND_FILTER_FUNCS(12, avx2);
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SAO_BAND_FILTER_FUNCS(12, avx2);
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#define SAO_BAND_INIT(bitd, opt) do { \
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c->sao_band_filter[0] = ff_hevc_sao_band_filter_8_##bitd##_##opt; \
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c->sao_band_filter[1] = ff_hevc_sao_band_filter_16_##bitd##_##opt; \
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c->sao_band_filter[2] = ff_hevc_sao_band_filter_32_##bitd##_##opt; \
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c->sao_band_filter[3] = ff_hevc_sao_band_filter_48_##bitd##_##opt; \
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c->sao_band_filter[4] = ff_hevc_sao_band_filter_64_##bitd##_##opt; \
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} while (0)
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#define SAO_EDGE_FILTER_FUNCS(bitd, opt) \
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void ff_hevc_sao_edge_filter_8_##bitd##_##opt(uint8_t *_dst, uint8_t *_src, ptrdiff_t stride_dst, int16_t *sao_offset_val, \
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int eo, int width, int height); \
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void ff_hevc_sao_edge_filter_16_##bitd##_##opt(uint8_t *_dst, uint8_t *_src, ptrdiff_t stride_dst, int16_t *sao_offset_val, \
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int eo, int width, int height); \
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void ff_hevc_sao_edge_filter_32_##bitd##_##opt(uint8_t *_dst, uint8_t *_src, ptrdiff_t stride_dst, int16_t *sao_offset_val, \
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int eo, int width, int height); \
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void ff_hevc_sao_edge_filter_48_##bitd##_##opt(uint8_t *_dst, uint8_t *_src, ptrdiff_t stride_dst, int16_t *sao_offset_val, \
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int eo, int width, int height); \
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void ff_hevc_sao_edge_filter_64_##bitd##_##opt(uint8_t *_dst, uint8_t *_src, ptrdiff_t stride_dst, int16_t *sao_offset_val, \
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int eo, int width, int height); \
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SAO_EDGE_FILTER_FUNCS(8, ssse3);
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SAO_EDGE_FILTER_FUNCS(8, avx2);
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#define SAO_EDGE_INIT(bitd, opt) do { \
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c->sao_edge_filter[0] = ff_hevc_sao_edge_filter_8_##bitd##_##opt; \
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||||||
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c->sao_edge_filter[1] = ff_hevc_sao_edge_filter_16_##bitd##_##opt; \
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||||||
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c->sao_edge_filter[2] = ff_hevc_sao_edge_filter_32_##bitd##_##opt; \
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||||||
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c->sao_edge_filter[3] = ff_hevc_sao_edge_filter_48_##bitd##_##opt; \
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||||||
|
c->sao_edge_filter[4] = ff_hevc_sao_edge_filter_64_##bitd##_##opt; \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
#define EPEL_LINKS(pointer, my, mx, fname, bitd, opt ) \
|
#define EPEL_LINKS(pointer, my, mx, fname, bitd, opt ) \
|
||||||
PEL_LINK(pointer, 1, my , mx , fname##4 , bitd, opt ); \
|
PEL_LINK(pointer, 1, my , mx , fname##4 , bitd, opt ); \
|
||||||
PEL_LINK(pointer, 2, my , mx , fname##6 , bitd, opt ); \
|
PEL_LINK(pointer, 2, my , mx , fname##6 , bitd, opt ); \
|
||||||
@ -520,14 +551,6 @@ SAO_BAND_FILTER_FUNCS(12, avx2);
|
|||||||
PEL_LINK(pointer, 8, my , mx , fname##48, bitd, opt ); \
|
PEL_LINK(pointer, 8, my , mx , fname##48, bitd, opt ); \
|
||||||
PEL_LINK(pointer, 9, my , mx , fname##64, bitd, opt )
|
PEL_LINK(pointer, 9, my , mx , fname##64, bitd, opt )
|
||||||
|
|
||||||
#define SAO_BAND_INIT(bitd, opt) do { \
|
|
||||||
c->sao_band_filter[0] = ff_hevc_sao_band_filter_8_##bitd##_##opt; \
|
|
||||||
c->sao_band_filter[1] = ff_hevc_sao_band_filter_16_##bitd##_##opt; \
|
|
||||||
c->sao_band_filter[2] = ff_hevc_sao_band_filter_32_##bitd##_##opt; \
|
|
||||||
c->sao_band_filter[3] = ff_hevc_sao_band_filter_48_##bitd##_##opt; \
|
|
||||||
c->sao_band_filter[4] = ff_hevc_sao_band_filter_64_##bitd##_##opt; \
|
|
||||||
} while (0)
|
|
||||||
|
|
||||||
void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
|
void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
|
||||||
{
|
{
|
||||||
int cpu_flags = av_get_cpu_flags();
|
int cpu_flags = av_get_cpu_flags();
|
||||||
@ -555,9 +578,12 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
|
|||||||
c->transform_add[2] = ff_hevc_transform_add16_8_sse2;
|
c->transform_add[2] = ff_hevc_transform_add16_8_sse2;
|
||||||
c->transform_add[3] = ff_hevc_transform_add32_8_sse2;
|
c->transform_add[3] = ff_hevc_transform_add32_8_sse2;
|
||||||
}
|
}
|
||||||
if (EXTERNAL_SSSE3(cpu_flags) && ARCH_X86_64) {
|
if (EXTERNAL_SSSE3(cpu_flags)) {
|
||||||
c->hevc_v_loop_filter_luma = ff_hevc_v_loop_filter_luma_8_ssse3;
|
if(ARCH_X86_64) {
|
||||||
c->hevc_h_loop_filter_luma = ff_hevc_h_loop_filter_luma_8_ssse3;
|
c->hevc_v_loop_filter_luma = ff_hevc_v_loop_filter_luma_8_ssse3;
|
||||||
|
c->hevc_h_loop_filter_luma = ff_hevc_h_loop_filter_luma_8_ssse3;
|
||||||
|
}
|
||||||
|
SAO_EDGE_INIT(8, ssse3);
|
||||||
}
|
}
|
||||||
if (EXTERNAL_SSE4(cpu_flags) && ARCH_X86_64) {
|
if (EXTERNAL_SSE4(cpu_flags) && ARCH_X86_64) {
|
||||||
|
|
||||||
@ -590,6 +616,9 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
|
|||||||
if (ARCH_X86_64) {
|
if (ARCH_X86_64) {
|
||||||
SAO_BAND_INIT(8, avx2);
|
SAO_BAND_INIT(8, avx2);
|
||||||
}
|
}
|
||||||
|
c->sao_edge_filter[2] = ff_hevc_sao_edge_filter_32_8_avx2;
|
||||||
|
c->sao_edge_filter[3] = ff_hevc_sao_edge_filter_48_8_avx2;
|
||||||
|
c->sao_edge_filter[4] = ff_hevc_sao_edge_filter_64_8_avx2;
|
||||||
|
|
||||||
c->transform_add[3] = ff_hevc_transform_add32_8_avx2;
|
c->transform_add[3] = ff_hevc_transform_add32_8_avx2;
|
||||||
}
|
}
|
||||||
|
Loading…
x
Reference in New Issue
Block a user