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ARMv6 optimised sse16
Originally committed as revision 21703 to svn://svn.ffmpeg.org/ffmpeg/trunk
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3132614305
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@ -513,3 +513,54 @@ function ff_pix_abs8_armv6, export=1
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add r0, r0, lr
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pop {r4-r9, pc}
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.endfunc
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function ff_sse16_armv6, export=1
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ldr r12, [sp]
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push {r4-r9, lr}
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mov r0, #0
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1:
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ldrd r4, r5, [r1]
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ldr r8, [r2]
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uxtb16 lr, r4
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uxtb16 r4, r4, ror #8
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uxtb16 r9, r8
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uxtb16 r8, r8, ror #8
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ldr r7, [r2, #4]
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usub16 lr, lr, r9
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usub16 r4, r4, r8
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smlad r0, lr, lr, r0
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uxtb16 r6, r5
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uxtb16 lr, r5, ror #8
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uxtb16 r8, r7
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uxtb16 r9, r7, ror #8
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smlad r0, r4, r4, r0
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ldrd r4, r5, [r1, #8]
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usub16 r6, r6, r8
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usub16 r8, lr, r9
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ldr r7, [r2, #8]
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smlad r0, r6, r6, r0
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uxtb16 lr, r4
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uxtb16 r4, r4, ror #8
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uxtb16 r9, r7
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uxtb16 r7, r7, ror #8
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smlad r0, r8, r8, r0
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ldr r8, [r2, #12]
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usub16 lr, lr, r9
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usub16 r4, r4, r7
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smlad r0, lr, lr, r0
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uxtb16 r6, r5
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uxtb16 r5, r5, ror #8
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uxtb16 r9, r8
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uxtb16 r8, r8, ror #8
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smlad r0, r4, r4, r0
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usub16 r6, r6, r9
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usub16 r5, r5, r8
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smlad r0, r6, r6, r0
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add r1, r1, r3
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add r2, r2, r3
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subs r12, r12, #1
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smlad r0, r5, r5, r0
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bgt 1b
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pop {r4-r9, pc}
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.endfunc
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@ -64,6 +64,9 @@ int ff_pix_abs16_y2_armv6(void *s, uint8_t *blk1, uint8_t *blk2,
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int ff_pix_abs8_armv6(void *s, uint8_t *blk1, uint8_t *blk2,
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int line_size, int h);
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int ff_sse16_armv6(void *s, uint8_t *blk1, uint8_t *blk2,
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int line_size, int h);
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void av_cold ff_dsputil_init_armv6(DSPContext* c, AVCodecContext *avctx)
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{
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if (!avctx->lowres && (avctx->idct_algo == FF_IDCT_AUTO ||
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@ -107,4 +110,6 @@ void av_cold ff_dsputil_init_armv6(DSPContext* c, AVCodecContext *avctx)
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c->sad[0] = ff_pix_abs16_armv6;
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c->sad[1] = ff_pix_abs8_armv6;
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c->sse[0] = ff_sse16_armv6;
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}
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