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ppc: dsputil: Drop trailing semicolon from macros

This allows for a more natural macro usage.
This commit is contained in:
Diego Biurrun 2014-01-15 19:54:17 +01:00
parent b7d24fd4b2
commit 1675975216
2 changed files with 29 additions and 29 deletions

View File

@ -127,7 +127,7 @@ static vector float fdctconsts[3] = {
b7 = vec_add(b7, x2); /* b7 = b7 + x2; */ \
b5 = vec_add(b5, x3); /* b5 = b5 + x3; */ \
b3 = vec_add(b3, x2); /* b3 = b3 + x2; */ \
b1 = vec_add(b1, x3); /* b1 = b1 + x3; */ \
b1 = vec_add(b1, x3) /* b1 = b1 + x3; */ \
/* }}} */
#define FDCTCOL(b0, b1, b2, b3, b4, b5, b6, b7) /* {{{ */ \
@ -184,7 +184,7 @@ static vector float fdctconsts[3] = {
b7 = vec_add(b7, x2); /* b7 += x2; */ \
b5 = vec_add(b5, x3); /* b5 += x3; */ \
b3 = vec_add(b3, x2); /* b3 += x2; */ \
b1 = vec_add(b1, x3); /* b1 += x3; */ \
b1 = vec_add(b1, x3) /* b1 += x3; */ \
/* }}} */
/* two dimensional discrete cosine transform */
@ -277,7 +277,7 @@ void ff_fdct_altivec(int16_t *block)
b ## n ## 1 = ((vector float) vec_unpackl(vs16(b ## n ## 0))); \
b ## n ## 0 = ((vector float) vec_unpackh(vs16(b ## n ## 0))); \
b ## n ## 1 = vec_ctf(vs32(b ## n ## 1), 0); \
b ## n ## 0 = vec_ctf(vs32(b ## n ## 0), 0);
b ## n ## 0 = vec_ctf(vs32(b ## n ## 0), 0)
CTF0(0);
CTF0(4);
@ -307,7 +307,7 @@ void ff_fdct_altivec(int16_t *block)
b ## 0 = ((vector float) vec_unpackh(vs16(x))); \
b ## 1 = ((vector float) vec_unpackl(vs16(x))); \
b ## 0 = vec_ctf(vs32(b ## 0), 0); \
b ## 1 = vec_ctf(vs32(b ## 1), 0); \
b ## 1 = vec_ctf(vs32(b ## 1), 0)
CTFX(x4, b7);
CTFX(x5, b5);
@ -432,7 +432,7 @@ void ff_fdct_altivec(int16_t *block)
b ## n ## 1 = ((vector float) vec_cts(b ## n ## 1, 0)); \
b ## n ## 0 = ((vector float) vec_pack(vs32(b ## n ## 0), \
vs32(b ## n ## 1))); \
vec_st(vs16(b ## n ## 0), 0, bp);
vec_st(vs16(b ## n ## 0), 0, bp)
bp = (vector signed short *) block;
CTS(0);

View File

@ -73,7 +73,7 @@
vy2 = vec_mradds(c4, t4, t0); \
vy5 = vec_mradds(mc4, t4, t0); \
vy3 = vec_adds(t2, t6); \
vy4 = vec_subs(t2, t6);
vy4 = vec_subs(t2, t6)
#define IDCT \
vec_s16 vy0, vy1, vy2, vy3, vy4, vy5, vy6, vy7; \
@ -99,7 +99,7 @@
vec_s16 vx6 = vec_mradds(vec_sl(block[6], shift), constants[3], zero); \
vec_s16 vx7 = vec_mradds(vec_sl(block[7], shift), constants[2], zero); \
\
IDCT_HALF \
IDCT_HALF; \
\
vx0 = vec_mergeh(vy0, vy4); \
vx1 = vec_mergel(vy0, vy4); \
@ -128,7 +128,7 @@
vx6 = vec_mergeh(vy3, vy7); \
vx7 = vec_mergel(vy3, vy7); \
\
IDCT_HALF \
IDCT_HALF; \
\
shift = vec_splat_u16(6); \
vx0 = vec_sra(vy0, shift); \
@ -138,7 +138,7 @@
vx4 = vec_sra(vy4, shift); \
vx5 = vec_sra(vy5, shift); \
vx6 = vec_sra(vy6, shift); \
vx7 = vec_sra(vy7, shift);
vx7 = vec_sra(vy7, shift)
static const vec_s16 constants[5] = {
{ 23170, 13573, 6518, 21895, -23170, -21895, 32, 31 },
@ -153,28 +153,28 @@ void ff_idct_put_altivec(uint8_t *dest, int stride, int16_t *blk)
vec_s16 *block = (vec_s16 *) blk;
vec_u8 tmp;
IDCT
IDCT;
#define COPY(dest, src) \
tmp = vec_packsu(src, src); \
vec_ste((vec_u32) tmp, 0, (unsigned int *) dest); \
vec_ste((vec_u32) tmp, 4, (unsigned int *) dest);
vec_ste((vec_u32) tmp, 4, (unsigned int *) dest)
COPY(dest, vx0)
COPY(dest, vx0);
dest += stride;
COPY(dest, vx1)
COPY(dest, vx1);
dest += stride;
COPY(dest, vx2)
COPY(dest, vx2);
dest += stride;
COPY(dest, vx3)
COPY(dest, vx3);
dest += stride;
COPY(dest, vx4)
COPY(dest, vx4);
dest += stride;
COPY(dest, vx5)
COPY(dest, vx5);
dest += stride;
COPY(dest, vx6)
COPY(dest, vx6);
dest += stride;
COPY(dest, vx7)
COPY(dest, vx7);
}
void ff_idct_add_altivec(uint8_t *dest, int stride, int16_t *blk)
@ -186,7 +186,7 @@ void ff_idct_add_altivec(uint8_t *dest, int stride, int16_t *blk)
vec_u8 perm1;
vec_u8 p0, p1, p;
IDCT
IDCT;
p0 = vec_lvsl(0, dest);
p1 = vec_lvsl(stride, dest);
@ -201,21 +201,21 @@ void ff_idct_add_altivec(uint8_t *dest, int stride, int16_t *blk)
tmp3 = vec_adds(tmp2, src); \
tmp = vec_packsu(tmp3, tmp3); \
vec_ste((vec_u32) tmp, 0, (unsigned int *) dest); \
vec_ste((vec_u32) tmp, 4, (unsigned int *) dest);
vec_ste((vec_u32) tmp, 4, (unsigned int *) dest)
ADD(dest, vx0, perm0)
ADD(dest, vx0, perm0);
dest += stride;
ADD(dest, vx1, perm1)
ADD(dest, vx1, perm1);
dest += stride;
ADD(dest, vx2, perm0)
ADD(dest, vx2, perm0);
dest += stride;
ADD(dest, vx3, perm1)
ADD(dest, vx3, perm1);
dest += stride;
ADD(dest, vx4, perm0)
ADD(dest, vx4, perm0);
dest += stride;
ADD(dest, vx5, perm1)
ADD(dest, vx5, perm1);
dest += stride;
ADD(dest, vx6, perm0)
ADD(dest, vx6, perm0);
dest += stride;
ADD(dest, vx7, perm1)
ADD(dest, vx7, perm1);
}