diff --git a/configure b/configure
index dfbadd0933..1224362e77 100755
--- a/configure
+++ b/configure
@@ -1525,6 +1525,7 @@ ARCH_EXT_LIST_ARM="
     neon
     vfp
     vfpv3
+    setend
 "
 
 ARCH_EXT_LIST_MIPS="
@@ -1951,6 +1952,7 @@ neon_deps_any="aarch64 arm"
 intrinsics_neon_deps="neon"
 vfp_deps_any="aarch64 arm"
 vfpv3_deps="vfp"
+setend_deps="arm"
 
 map 'eval ${v}_inline_deps=inline_asm' $ARCH_EXT_LIST_ARM
 
@@ -4447,6 +4449,7 @@ EOF
     enabled neon    && check_insn neon    'vadd.i16 q0, q0, q0'
     enabled vfp     && check_insn vfp     'fadds s0, s0, s0'
     enabled vfpv3   && check_insn vfpv3   'vmov.f32 s0, #1.0'
+    enabled setend  && check_insn setend  'setend be'
 
     [ $target_os = linux ] || [ $target_os = android ] ||
         map 'enabled_any ${v}_external ${v}_inline || disable $v' \
diff --git a/libavutil/arm/cpu.c b/libavutil/arm/cpu.c
index f6cf338591..f1683e8d76 100644
--- a/libavutil/arm/cpu.c
+++ b/libavutil/arm/cpu.c
@@ -128,6 +128,12 @@ int ff_get_cpu_flags_arm(void)
        trickle down. */
     if (flags & (AV_CPU_FLAG_VFPV3 | AV_CPU_FLAG_NEON))
         flags |= AV_CPU_FLAG_ARMV6T2;
+    else
+    /* Some functions use the 'setend' instruction which is deprecated on ARMv8
+     * and serializing on some ARMv7 cores. This ensures such functions
+     * are only enabled on ARMv6. */
+        flags |= AV_CPU_FLAG_SETEND;
+
     if (flags & AV_CPU_FLAG_ARMV6T2)
         flags |= AV_CPU_FLAG_ARMV6;
 
@@ -143,7 +149,8 @@ int ff_get_cpu_flags_arm(void)
            AV_CPU_FLAG_ARMV6T2 * HAVE_ARMV6T2 |
            AV_CPU_FLAG_VFP     * HAVE_VFP     |
            AV_CPU_FLAG_VFPV3   * HAVE_VFPV3   |
-           AV_CPU_FLAG_NEON    * HAVE_NEON;
+           AV_CPU_FLAG_NEON    * HAVE_NEON    |
+           AV_CPU_FLAG_SETEND  * !(HAVE_NEON | HAVE_VFPV3);
 }
 
 #endif
diff --git a/libavutil/arm/cpu.h b/libavutil/arm/cpu.h
index f056a91ca5..9b3b6ff58b 100644
--- a/libavutil/arm/cpu.h
+++ b/libavutil/arm/cpu.h
@@ -29,11 +29,6 @@
 #define have_vfp(flags)     CPUEXT(flags, VFP)
 #define have_vfpv3(flags)   CPUEXT(flags, VFPV3)
 #define have_neon(flags)    CPUEXT(flags, NEON)
-
-/* Some functions use the 'setend' instruction which is deprecated on ARMv8
- * and serializing on some ARMv7 cores. This macro ensures such functions
- * are only enabled on ARMv6. */
-#define have_setend(flags)                                              \
-    (have_armv6(flags) && !(have_vfpv3(flags) || have_neon(flags)))
+#define have_setend(flags)  CPUEXT(flags, SETEND)
 
 #endif /* AVUTIL_ARM_CPU_H */
diff --git a/libavutil/cpu.c b/libavutil/cpu.c
index 1cd0522dc6..53c12273ef 100644
--- a/libavutil/cpu.c
+++ b/libavutil/cpu.c
@@ -225,6 +225,7 @@ int av_parse_cpu_caps(unsigned *flags, const char *s)
         { "vfp",      NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP      },    .unit = "flags" },
         { "vfpv3",    NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3    },    .unit = "flags" },
         { "neon",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON     },    .unit = "flags" },
+        { "setend",   NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SETEND   },    .unit = "flags" },
 #elif ARCH_AARCH64
         { "armv8",    NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8    },    .unit = "flags" },
         { "neon",     NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON     },    .unit = "flags" },
@@ -303,6 +304,7 @@ static const struct {
     { AV_CPU_FLAG_VFP,       "vfp"        },
     { AV_CPU_FLAG_VFPV3,     "vfpv3"      },
     { AV_CPU_FLAG_NEON,      "neon"       },
+    { AV_CPU_FLAG_SETEND,    "setend"     },
 #elif ARCH_PPC
     { AV_CPU_FLAG_ALTIVEC,   "altivec"    },
 #elif ARCH_X86
diff --git a/libavutil/cpu.h b/libavutil/cpu.h
index 8ff14d3ada..277e489788 100644
--- a/libavutil/cpu.h
+++ b/libavutil/cpu.h
@@ -64,6 +64,7 @@
 #define AV_CPU_FLAG_VFPV3        (1 << 4)
 #define AV_CPU_FLAG_NEON         (1 << 5)
 #define AV_CPU_FLAG_ARMV8        (1 << 6)
+#define AV_CPU_FLAG_SETEND       (1 <<16)
 
 /**
  * Return the flags which specify extensions supported by the CPU.