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lavc/aarch64: new optimization for 8-bit hevc_epel_hv
checkasm bench: put_hevc_epel_hv4_8_c: 213.7 put_hevc_epel_hv4_8_i8mm: 59.4 put_hevc_epel_hv6_8_c: 350.9 put_hevc_epel_hv6_8_i8mm: 130.2 put_hevc_epel_hv8_8_c: 548.7 put_hevc_epel_hv8_8_i8mm: 136.9 put_hevc_epel_hv12_8_c: 1126.7 put_hevc_epel_hv12_8_i8mm: 302.2 put_hevc_epel_hv16_8_c: 1925.2 put_hevc_epel_hv16_8_i8mm: 459.9 put_hevc_epel_hv24_8_c: 4301.9 put_hevc_epel_hv24_8_i8mm: 1024.9 put_hevc_epel_hv32_8_c: 7509.2 put_hevc_epel_hv32_8_i8mm: 1680.4 put_hevc_epel_hv48_8_c: 16566.9 put_hevc_epel_hv48_8_i8mm: 3945.4 put_hevc_epel_hv64_8_c: 29134.2 put_hevc_epel_hv64_8_i8mm: 6567.7 Co-Authored-By: J. Dekker <jdek@itanimul.li> Signed-off-by: Martin Storsjö <martin@martin.st>
This commit is contained in:
Logan Lyu
Martin Storsjö
parent
22c7291506
commit
265450b89e
@ -1018,6 +1018,262 @@ function ff_hevc_put_hevc_epel_h64_8_neon_i8mm, export=1
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ret
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endfunc
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function ff_hevc_put_hevc_epel_hv4_8_neon_i8mm, export=1
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add w10, w3, #3
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lsl x10, x10, #7
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sub sp, sp, x10 // tmp_array
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stp x5, x30, [sp, #-32]!
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stp x0, x3, [sp, #16]
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add x0, sp, #32
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sub x1, x1, x2
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add w3, w3, #3
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bl X(ff_hevc_put_hevc_epel_h4_8_neon_i8mm)
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ldp x0, x3, [sp, #16]
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ldp x5, x30, [sp], #32
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load_epel_filterh x5, x4
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mov x10, #(MAX_PB_SIZE * 2)
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ldr d16, [sp]
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ldr d17, [sp, x10]
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add sp, sp, x10, lsl #1
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ld1 {v18.4h}, [sp], x10
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.macro calc src0, src1, src2, src3
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ld1 {\src3\().4h}, [sp], x10
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calc_epelh v4, \src0, \src1, \src2, \src3
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subs w3, w3, #1
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st1 {v4.4h}, [x0], x10
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.endm
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1: calc_all4
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_hv6_8_neon_i8mm, export=1
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add w10, w3, #3
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lsl x10, x10, #7
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sub sp, sp, x10 // tmp_array
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stp x5, x30, [sp, #-32]!
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stp x0, x3, [sp, #16]
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add x0, sp, #32
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sub x1, x1, x2
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add w3, w3, #3
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bl X(ff_hevc_put_hevc_epel_h6_8_neon_i8mm)
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ldp x0, x3, [sp, #16]
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ldp x5, x30, [sp], #32
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load_epel_filterh x5, x4
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mov x5, #120
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mov x10, #(MAX_PB_SIZE * 2)
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ldr q16, [sp]
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ldr q17, [sp, x10]
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add sp, sp, x10, lsl #1
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ld1 {v18.8h}, [sp], x10
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.macro calc src0, src1, src2, src3
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ld1 {\src3\().8h}, [sp], x10
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calc_epelh v4, \src0, \src1, \src2, \src3
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calc_epelh2 v4, v5, \src0, \src1, \src2, \src3
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st1 {v4.d}[0], [x0], #8
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subs w3, w3, #1
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st1 {v4.s}[2], [x0], x5
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.endm
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1: calc_all4
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_hv8_8_neon_i8mm, export=1
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add w10, w3, #3
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lsl x10, x10, #7
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sub sp, sp, x10 // tmp_array
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stp x5, x30, [sp, #-32]!
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stp x0, x3, [sp, #16]
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add x0, sp, #32
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sub x1, x1, x2
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add w3, w3, #3
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bl X(ff_hevc_put_hevc_epel_h8_8_neon_i8mm)
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ldp x0, x3, [sp, #16]
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ldp x5, x30, [sp], #32
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load_epel_filterh x5, x4
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mov x10, #(MAX_PB_SIZE * 2)
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ldr q16, [sp]
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ldr q17, [sp, x10]
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add sp, sp, x10, lsl #1
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ld1 {v18.8h}, [sp], x10
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.macro calc src0, src1, src2, src3
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ld1 {\src3\().8h}, [sp], x10
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calc_epelh v4, \src0, \src1, \src2, \src3
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calc_epelh2 v4, v5, \src0, \src1, \src2, \src3
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subs w3, w3, #1
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st1 {v4.8h}, [x0], x10
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.endm
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1: calc_all4
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_hv12_8_neon_i8mm, export=1
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add w10, w3, #3
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lsl x10, x10, #7
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sub sp, sp, x10 // tmp_array
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stp x5, x30, [sp, #-32]!
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stp x0, x3, [sp, #16]
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add x0, sp, #32
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sub x1, x1, x2
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add w3, w3, #3
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bl X(ff_hevc_put_hevc_epel_h12_8_neon_i8mm)
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ldp x0, x3, [sp, #16]
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ldp x5, x30, [sp], #32
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load_epel_filterh x5, x4
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mov x5, #112
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mov x10, #(MAX_PB_SIZE * 2)
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ld1 {v16.8h, v17.8h}, [sp], x10
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ld1 {v18.8h, v19.8h}, [sp], x10
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ld1 {v20.8h, v21.8h}, [sp], x10
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.macro calc src0, src1, src2, src3, src4, src5, src6, src7
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ld1 {\src6\().8h, \src7\().8h}, [sp], x10
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calc_epelh v4, \src0, \src2, \src4, \src6
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calc_epelh2 v4, v5, \src0, \src2, \src4, \src6
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calc_epelh v5, \src1, \src3, \src5, \src7
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st1 {v4.8h}, [x0], #16
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subs w3, w3, #1
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st1 {v5.4h}, [x0], x5
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.endm
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1: calc_all8
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_hv16_8_neon_i8mm, export=1
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add w10, w3, #3
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lsl x10, x10, #7
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sub sp, sp, x10 // tmp_array
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stp x5, x30, [sp, #-32]!
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stp x0, x3, [sp, #16]
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add x0, sp, #32
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sub x1, x1, x2
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add w3, w3, #3
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bl X(ff_hevc_put_hevc_epel_h16_8_neon_i8mm)
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ldp x0, x3, [sp, #16]
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ldp x5, x30, [sp], #32
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load_epel_filterh x5, x4
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mov x10, #(MAX_PB_SIZE * 2)
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ld1 {v16.8h, v17.8h}, [sp], x10
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ld1 {v18.8h, v19.8h}, [sp], x10
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ld1 {v20.8h, v21.8h}, [sp], x10
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.macro calc src0, src1, src2, src3, src4, src5, src6, src7
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ld1 {\src6\().8h, \src7\().8h}, [sp], x10
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calc_epelh v4, \src0, \src2, \src4, \src6
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calc_epelh2 v4, v5, \src0, \src2, \src4, \src6
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calc_epelh v5, \src1, \src3, \src5, \src7
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calc_epelh2 v5, v6, \src1, \src3, \src5, \src7
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subs w3, w3, #1
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st1 {v4.8h, v5.8h}, [x0], x10
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.endm
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1: calc_all8
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_hv24_8_neon_i8mm, export=1
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add w10, w3, #3
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lsl x10, x10, #7
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sub sp, sp, x10 // tmp_array
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stp x5, x30, [sp, #-32]!
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stp x0, x3, [sp, #16]
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add x0, sp, #32
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sub x1, x1, x2
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add w3, w3, #3
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bl X(ff_hevc_put_hevc_epel_h24_8_neon_i8mm)
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ldp x0, x3, [sp, #16]
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ldp x5, x30, [sp], #32
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load_epel_filterh x5, x4
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mov x10, #(MAX_PB_SIZE * 2)
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ld1 {v16.8h, v17.8h, v18.8h}, [sp], x10
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ld1 {v19.8h, v20.8h, v21.8h}, [sp], x10
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ld1 {v22.8h, v23.8h, v24.8h}, [sp], x10
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.macro calc src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10, src11
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ld1 {\src9\().8h-\src11\().8h}, [sp], x10
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calc_epelh v4, \src0, \src3, \src6, \src9
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calc_epelh2 v4, v5, \src0, \src3, \src6, \src9
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calc_epelh v5, \src1, \src4, \src7, \src10
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calc_epelh2 v5, v6, \src1, \src4, \src7, \src10
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calc_epelh v6, \src2, \src5, \src8, \src11
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calc_epelh2 v6, v7, \src2, \src5, \src8, \src11
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subs w3, w3, #1
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st1 {v4.8h-v6.8h}, [x0], x10
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.endm
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1: calc_all12
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.purgem calc
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2: ret
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endfunc
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function ff_hevc_put_hevc_epel_hv32_8_neon_i8mm, export=1
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stp x4, x5, [sp, #-64]!
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stp x2, x3, [sp, #16]
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stp x0, x1, [sp, #32]
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str x30, [sp, #48]
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mov x6, #16
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bl X(ff_hevc_put_hevc_epel_hv16_8_neon_i8mm)
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ldp x0, x1, [sp, #32]
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ldp x2, x3, [sp, #16]
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ldp x4, x5, [sp], #48
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add x0, x0, #32
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add x1, x1, #16
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mov x6, #16
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bl X(ff_hevc_put_hevc_epel_hv16_8_neon_i8mm)
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ldr x30, [sp], #16
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ret
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endfunc
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function ff_hevc_put_hevc_epel_hv48_8_neon_i8mm, export=1
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stp x4, x5, [sp, #-64]!
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stp x2, x3, [sp, #16]
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stp x0, x1, [sp, #32]
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str x30, [sp, #48]
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mov x6, #24
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bl X(ff_hevc_put_hevc_epel_hv24_8_neon_i8mm)
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ldp x0, x1, [sp, #32]
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ldp x2, x3, [sp, #16]
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ldp x4, x5, [sp], #48
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add x0, x0, #48
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add x1, x1, #24
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mov x6, #24
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bl X(ff_hevc_put_hevc_epel_hv24_8_neon_i8mm)
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ldr x30, [sp], #16
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ret
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endfunc
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function ff_hevc_put_hevc_epel_hv64_8_neon_i8mm, export=1
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stp x4, x5, [sp, #-64]!
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stp x2, x3, [sp, #16]
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stp x0, x1, [sp, #32]
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str x30, [sp, #48]
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mov x6, #16
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bl X(ff_hevc_put_hevc_epel_hv16_8_neon_i8mm)
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ldp x4, x5, [sp]
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ldp x2, x3, [sp, #16]
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ldp x0, x1, [sp, #32]
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add x0, x0, #32
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add x1, x1, #16
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mov x6, #16
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bl X(ff_hevc_put_hevc_epel_hv16_8_neon_i8mm)
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ldp x4, x5, [sp]
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ldp x2, x3, [sp, #16]
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ldp x0, x1, [sp, #32]
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add x0, x0, #64
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add x1, x1, #32
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mov x6, #16
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bl X(ff_hevc_put_hevc_epel_hv16_8_neon_i8mm)
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ldp x0, x1, [sp, #32]
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ldp x2, x3, [sp, #16]
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ldp x4, x5, [sp], #48
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add x0, x0, #96
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add x1, x1, #48
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mov x6, #16
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bl X(ff_hevc_put_hevc_epel_hv16_8_neon_i8mm)
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ldr x30, [sp], #16
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ret
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endfunc
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function ff_hevc_put_hevc_epel_uni_hv4_8_neon_i8mm, export=1
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add w10, w4, #3
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lsl x10, x10, #7
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@ -191,6 +191,10 @@ NEON8_FNPROTO(epel_h, (int16_t *dst,
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const uint8_t *_src, ptrdiff_t _srcstride,
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int height, intptr_t mx, intptr_t my, int width), _i8mm);
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NEON8_FNPROTO(epel_hv, (int16_t *dst,
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const uint8_t *src, ptrdiff_t srcstride,
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int height, intptr_t mx, intptr_t my, int width), _i8mm);
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NEON8_FNPROTO(epel_uni_w_h, (uint8_t *_dst, ptrdiff_t _dststride,
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const uint8_t *_src, ptrdiff_t _srcstride,
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int height, int denom, int wx, int ox,
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@ -322,6 +326,7 @@ av_cold void ff_hevc_dsp_init_aarch64(HEVCDSPContext *c, const int bit_depth)
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if (have_i8mm(cpu_flags)) {
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NEON8_FNASSIGN(c->put_hevc_epel, 0, 1, epel_h, _i8mm);
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NEON8_FNASSIGN(c->put_hevc_epel, 1, 1, epel_hv, _i8mm);
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NEON8_FNASSIGN(c->put_hevc_epel_uni, 1, 1, epel_uni_hv, _i8mm);
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NEON8_FNASSIGN(c->put_hevc_epel_uni_w, 0, 1, epel_uni_w_h ,_i8mm);
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NEON8_FNASSIGN(c->put_hevc_qpel, 0, 1, qpel_h, _i8mm);
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