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configure: Add wasm as a fake arch
And add wasm simd128 flag, so we can add simd128 optimizations. It can be enabled by put -msimd128 to extra cflags. There is no runtime detection on simd128 support yet. I think that needs to be done with JavaScript. Signed-off-by: Zhao Zhili <zhilizhao@tencent.com>
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3
Makefile
3
Makefile
@ -104,7 +104,8 @@ SUBDIR_VARS := CLEANFILES FFLIBS HOSTPROGS TESTPROGS TOOLS \
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ALTIVEC-OBJS VSX-OBJS MMX-OBJS X86ASM-OBJS \
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MIPSFPU-OBJS MIPSDSPR2-OBJS MIPSDSP-OBJS MSA-OBJS \
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MMI-OBJS LSX-OBJS LASX-OBJS RV-OBJS RVV-OBJS RVVB-OBJS \
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OBJS SLIBOBJS SHLIBOBJS STLIBOBJS HOSTOBJS TESTOBJS
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OBJS SLIBOBJS SHLIBOBJS STLIBOBJS HOSTOBJS TESTOBJS \
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SIMD128-OBJS
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define RESET
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$(1) :=
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16
configure
vendored
16
configure
vendored
@ -480,6 +480,7 @@ Optimization options (experts only):
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--disable-lasx disable Loongson LASX optimizations
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--disable-rvv disable RISC-V Vector optimizations
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--disable-fast-unaligned consider unaligned accesses slow
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--disable-simd128 disable WebAssembly simd128 optimizations
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Developer options (useful when working on FFmpeg itself):
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--disable-debug disable debugging symbols
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@ -2149,6 +2150,7 @@ ARCH_LIST="
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sparc64
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tilegx
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tilepro
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wasm
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x86
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x86_32
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x86_64
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@ -2189,6 +2191,10 @@ ARCH_EXT_LIST_LOONGSON="
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lasx
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"
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ARCH_EXT_LIST_WASM="
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simd128
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"
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ARCH_EXT_LIST_X86_SIMD="
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aesni
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amd3dnow
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@ -2235,6 +2241,7 @@ ARCH_EXT_LIST="
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$ARCH_EXT_LIST_ARM
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$ARCH_EXT_LIST_PPC
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$ARCH_EXT_LIST_RISCV
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$ARCH_EXT_LIST_WASM
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$ARCH_EXT_LIST_X86
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$ARCH_EXT_LIST_MIPS
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$ARCH_EXT_LIST_LOONGSON
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@ -2791,6 +2798,8 @@ mipsdsp_deps="mips"
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mipsdspr2_deps="mips"
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msa_deps="mipsfpu"
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simd128_deps="wasm"
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x86_64_select="i686"
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x86_64_suggest="fast_cmov"
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@ -5293,6 +5302,9 @@ case "$arch" in
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tilegx|tile-gx)
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arch="tilegx"
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;;
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wasm*)
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arch="wasm"
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;;
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i[3-6]86*|i86pc|BePC|x86pc|x86_64|x86_32|amd64)
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arch="x86"
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;;
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@ -6403,6 +6415,10 @@ elif enabled riscv; then
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enabled rv_zicbop && check_inline_asm rv_zicbop '".option arch, +zicbop\nprefetch.r 64(a0)"'
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enabled rv_zvbb && check_inline_asm rv_zvbb '".option arch, +zvbb\nvclz.v v0, v8"'
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elif enabled wasm; then
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enabled simd128 && check_cc simd128 wasm_simd128.h "v128_t v = wasm_v128_load(0);"
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elif enabled x86; then
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check_builtin rdtsc intrin.h "__rdtsc()"
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@ -21,5 +21,7 @@ OBJS-$(HAVE_RV) += $(RV-OBJS) $(RV-OBJS-yes)
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OBJS-$(HAVE_RVV) += $(RVV-OBJS) $(RVV-OBJS-yes)
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OBJS-$(HAVE_RV_ZVBB) += $(RVVB-OBJS) $(RVVB-OBJS-yes)
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OBJS-$(HAVE_SIMD128) += $(SIMD128-OBJS) $(SIMD128-OBJS-yes)
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OBJS-$(HAVE_MMX) += $(MMX-OBJS) $(MMX-OBJS-yes)
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OBJS-$(HAVE_X86ASM) += $(X86ASM-OBJS) $(X86ASM-OBJS-yes)
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@ -68,6 +68,8 @@ static int get_cpu_flags(void)
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return ff_get_cpu_flags_ppc();
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#elif ARCH_RISCV
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return ff_get_cpu_flags_riscv();
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#elif ARCH_WASM
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return ff_get_cpu_flags_wasm();
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#elif ARCH_X86
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return ff_get_cpu_flags_x86();
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#elif ARCH_LOONGARCH
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@ -200,6 +202,8 @@ int av_parse_cpu_caps(unsigned *flags, const char *s)
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{ "zbb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB_BASIC }, .unit = "flags" },
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{ "zvbb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RV_ZVBB }, .unit = "flags" },
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{ "misaligned", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RV_MISALIGNED }, .unit = "flags" },
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#elif ARCH_WASM
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{ "simd128", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SIMD128 }, .unit = "flags" },
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#endif
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{ NULL },
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};
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@ -283,6 +287,8 @@ size_t av_cpu_max_align(void)
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return ff_get_cpu_max_align_arm();
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#elif ARCH_PPC
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return ff_get_cpu_max_align_ppc();
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#elif ARCH_WASM
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return ff_get_cpu_max_align_wasm();
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#elif ARCH_X86
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return ff_get_cpu_max_align_x86();
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#elif ARCH_LOONGARCH
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@ -101,6 +101,9 @@
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#define AV_CPU_FLAG_RV_MISALIGNED (1 <<10) ///< Fast misaligned accesses
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#define AV_CPU_FLAG_RVB (1 <<11) ///< B (bit manipulations)
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// WASM extensions
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#define AV_CPU_FLAG_SIMD128 (1 << 0)
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/**
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* Return the flags which specify extensions supported by the CPU.
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* The returned value is affected by av_force_cpu_flags() if that was used
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@ -49,6 +49,7 @@ int ff_get_cpu_flags_aarch64(void);
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int ff_get_cpu_flags_arm(void);
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int ff_get_cpu_flags_ppc(void);
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int ff_get_cpu_flags_riscv(void);
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int ff_get_cpu_flags_wasm(void);
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int ff_get_cpu_flags_x86(void);
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int ff_get_cpu_flags_loongarch(void);
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@ -56,6 +57,7 @@ size_t ff_get_cpu_max_align_mips(void);
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size_t ff_get_cpu_max_align_aarch64(void);
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size_t ff_get_cpu_max_align_arm(void);
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size_t ff_get_cpu_max_align_ppc(void);
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size_t ff_get_cpu_max_align_wasm(void);
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size_t ff_get_cpu_max_align_x86(void);
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size_t ff_get_cpu_max_align_loongarch(void);
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@ -104,6 +104,8 @@ static const struct {
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{ AV_CPU_FLAG_RVV_F64, "zve64d" },
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{ AV_CPU_FLAG_RV_ZVBB, "zvbb" },
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{ AV_CPU_FLAG_RV_MISALIGNED, "misaligned" },
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#elif ARCH_WASM
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{ AV_CPU_FLAG_SIMD128, "simd128" },
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#endif
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{ 0 }
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};
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1
libavutil/wasm/Makefile
Normal file
1
libavutil/wasm/Makefile
Normal file
@ -0,0 +1 @@
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OBJS += wasm/cpu.o
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libavutil/wasm/cpu.c
Normal file
42
libavutil/wasm/cpu.c
Normal file
@ -0,0 +1,42 @@
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/*
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* Copyright (c) 2024 Zhao Zhili
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdint.h>
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#include "libavutil/cpu_internal.h"
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int ff_get_cpu_flags_wasm(void)
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{
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int flags = 0;
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#if HAVE_SIMD128
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flags |= AV_CPU_FLAG_SIMD128;
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#endif
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return flags;
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}
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size_t ff_get_cpu_max_align_wasm(void)
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{
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#if HAVE_SIMD128
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return 16;
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#else
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return 8;
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#endif
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}
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