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tests/checkasm: Add check_vvc_sad to vvc_mc.c

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Adds checkasm for DMVR SAD AVX2 implementation.

Benchmarks ( AMD 7940HS )
vvc_sad_8x8_c: 50.3
vvc_sad_8x8_avx2: 0.3
vvc_sad_16x16_c: 250.3
vvc_sad_16x16_avx2: 10.3
vvc_sad_32x32_c: 1020.3
vvc_sad_32x32_avx2: 60.3
vvc_sad_64x64_c: 3850.3
vvc_sad_64x64_avx2: 220.3
vvc_sad_128x128_c: 14100.3
vvc_sad_128x128_avx2: 840.3

Reviewed-by: Ronald S. Bultje <rsbultje@gmail.com>
Signed-off-by: James Almer <jamrial@gmail.com>
This commit is contained in:
Stone Chen 2024-05-21 20:00:34 -04:00 committed by James Almer
parent 0e52a4e434
commit 2e877090f9
1 changed files with 39 additions and 1 deletions
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40
tests/checkasm/vvc_mc.c
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@ -45,7 +45,7 @@ static const int sizes[] = { 2, 4, 8, 16, 32, 64, 128 };
#define randomize_buffers(buf0, buf1, size, mask) \
do { \
int k; \
for (k = 0; k < size; k += 4) { \
for (k = 0; k < size; k += 4 / sizeof(*buf0)) { \
uint32_t r = rnd() & mask; \
AV_WN32A(buf0 + k, r); \
AV_WN32A(buf1 + k, r); \
@ -324,8 +324,46 @@ static void check_avg(void)
report("avg");
}
static void check_vvc_sad(void)
{
const int bit_depth = 10;
VVCDSPContext c;
LOCAL_ALIGNED_32(uint16_t, src0, [MAX_CTU_SIZE * MAX_CTU_SIZE * 4]);
LOCAL_ALIGNED_32(uint16_t, src1, [MAX_CTU_SIZE * MAX_CTU_SIZE * 4]);
declare_func(int, const int16_t *src0, const int16_t *src1, int dx, int dy, int block_w, int block_h);
ff_vvc_dsp_init(&c, bit_depth);
memset(src0, 0, MAX_CTU_SIZE * MAX_CTU_SIZE * 4 * sizeof(uint16_t));
memset(src1, 0, MAX_CTU_SIZE * MAX_CTU_SIZE * 4 * sizeof(uint16_t));
randomize_pixels(src0, src1, MAX_CTU_SIZE * MAX_CTU_SIZE * 4);
for (int h = 8; h <= MAX_CTU_SIZE; h *= 2) {
for (int w = 8; w <= MAX_CTU_SIZE; w *= 2) {
for(int offy = 0; offy <= 4; offy++) {
for(int offx = 0; offx <= 4; offx++) {
if(check_func(c.inter.sad, "sad_%dx%d", w, h)) {
int result0;
int result1;
result0 = call_ref(src0 + PIXEL_STRIDE * 2 + 2, src1 + PIXEL_STRIDE * 2 + 2, offx, offy, w, h);
result1 = call_new(src0 + PIXEL_STRIDE * 2 + 2, src1 + PIXEL_STRIDE * 2 + 2, offx, offy, w, h);
if (result1 != result0)
fail();
if(w == h && offx == 0 && offy == 0)
bench_new(src0 + PIXEL_STRIDE * 2 + 2, src1 + PIXEL_STRIDE * 2 + 2, offx, offy, w, h);
}
}
}
}
}
report("sad");
}
void checkasm_check_vvc_mc(void)
{
check_vvc_sad();
check_put_vvc_luma();
check_put_vvc_luma_uni();
check_put_vvc_chroma();