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https://github.com/FFmpeg/FFmpeg.git
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riscv: test for assembler support
This should fix the build on LLVM 16 and earlier, at the cost of turning
all non-RVV optimisations off.
(cherry picked from commit b3825bbe45
)
Signed-off-by: Brad Smith <brad@comstyle.com>
This commit is contained in:
parent
a6a07eebdf
commit
30cd0d7bd0
6
Makefile
6
Makefile
@ -93,10 +93,10 @@ ffbuild/.config: $(CONFIGURABLE_COMPONENTS)
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SUBDIR_VARS := CLEANFILES FFLIBS HOSTPROGS TESTPROGS TOOLS \
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HEADERS ARCH_HEADERS BUILT_HEADERS SKIPHEADERS \
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ARMV5TE-OBJS ARMV6-OBJS ARMV8-OBJS VFP-OBJS NEON-OBJS \
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ALTIVEC-OBJS VSX-OBJS RVV-OBJS MMX-OBJS X86ASM-OBJS \
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ALTIVEC-OBJS VSX-OBJS MMX-OBJS X86ASM-OBJS \
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MIPSFPU-OBJS MIPSDSPR2-OBJS MIPSDSP-OBJS MSA-OBJS \
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MMI-OBJS LSX-OBJS LASX-OBJS OBJS SLIBOBJS SHLIBOBJS \
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STLIBOBJS HOSTOBJS TESTOBJS
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MMI-OBJS LSX-OBJS LASX-OBJS RV-OBJS RVV-OBJS \
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OBJS SLIBOBJS SHLIBOBJS STLIBOBJS HOSTOBJS TESTOBJS
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define RESET
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$(1) :=
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5
configure
vendored
5
configure
vendored
@ -2150,6 +2150,7 @@ ARCH_EXT_LIST_PPC="
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"
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ARCH_EXT_LIST_RISCV="
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rv
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rvv
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"
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@ -2678,7 +2679,8 @@ ppc4xx_deps="ppc"
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vsx_deps="altivec"
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power8_deps="vsx"
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rvv_deps="riscv"
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rv_deps="riscv"
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rvv_deps="rv"
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loongson2_deps="mips"
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loongson3_deps="mips"
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@ -6218,6 +6220,7 @@ elif enabled ppc; then
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elif enabled riscv; then
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enabled rv && check_inline_asm rv '".option arch, +zbb\nrev8 t0, t1"'
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enabled rvv && check_inline_asm rvv '".option arch, +v\nvsetivli zero, 0, e8, m1, ta, ma"'
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elif enabled x86; then
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@ -15,6 +15,7 @@ OBJS-$(HAVE_LASX) += $(LASX-OBJS) $(LASX-OBJS-yes)
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OBJS-$(HAVE_ALTIVEC) += $(ALTIVEC-OBJS) $(ALTIVEC-OBJS-yes)
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OBJS-$(HAVE_VSX) += $(VSX-OBJS) $(VSX-OBJS-yes)
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OBJS-$(HAVE_RV) += $(RV-OBJS) $(RV-OBJS-yes)
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OBJS-$(HAVE_RVV) += $(RVV-OBJS) $(RVV-OBJS-yes)
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OBJS-$(HAVE_MMX) += $(MMX-OBJS) $(MMX-OBJS-yes)
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@ -1,14 +1,14 @@
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OBJS-$(CONFIG_AAC_DECODER) += riscv/aacpsdsp_init.o
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RVV-OBJS-$(CONFIG_AAC_DECODER) += riscv/aacpsdsp_rvv.o
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OBJS-$(CONFIG_AC3DSP) += riscv/ac3dsp_init.o \
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riscv/ac3dsp_rvb.o
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OBJS-$(CONFIG_AC3DSP) += riscv/ac3dsp_init.o
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RV-OBJS-$(CONFIG_AC3DSP) += riscv/ac3dsp_rvb.o
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OBJS-$(CONFIG_ALAC_DECODER) += riscv/alacdsp_init.o
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RVV-OBJS-$(CONFIG_ALAC_DECODER) += riscv/alacdsp_rvv.o
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OBJS-$(CONFIG_AUDIODSP) += riscv/audiodsp_init.o \
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riscv/audiodsp_rvf.o
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OBJS-$(CONFIG_AUDIODSP) += riscv/audiodsp_init.o
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RV-OBJS-$(CONFIG_AUDIODSP) += riscv/audiodsp_rvf.o
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RVV-OBJS-$(CONFIG_AUDIODSP) += riscv/audiodsp_rvv.o
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OBJS-$(CONFIG_BSWAPDSP) += riscv/bswapdsp_init.o \
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riscv/bswapdsp_rvb.o
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OBJS-$(CONFIG_BSWAPDSP) += riscv/bswapdsp_init.o
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RV-OBJS-$(CONFIG_BSWAPDSP) += riscv/bswapdsp_rvb.o
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RVV-OBJS-$(CONFIG_BSWAPDSP) += riscv/bswapdsp_rvv.o
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OBJS-$(CONFIG_EXR_DECODER) += riscv/exrdsp_init.o
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RVV-OBJS-$(CONFIG_EXR_DECODER) += riscv/exrdsp_rvv.o
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@ -22,8 +22,8 @@ OBJS-$(CONFIG_IDCTDSP) += riscv/idctdsp_init.o
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RVV-OBJS-$(CONFIG_IDCTDSP) += riscv/idctdsp_rvv.o
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OBJS-$(CONFIG_OPUS_DECODER) += riscv/opusdsp_init.o
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RVV-OBJS-$(CONFIG_OPUS_DECODER) += riscv/opusdsp_rvv.o
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OBJS-$(CONFIG_PIXBLOCKDSP) += riscv/pixblockdsp_init.o \
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riscv/pixblockdsp_rvi.o
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OBJS-$(CONFIG_PIXBLOCKDSP) += riscv/pixblockdsp_init.o
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RV-OBJS-$(CONFIG_PIXBLOCKDSP) += riscv/pixblockdsp_rvi.o
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RVV-OBJS-$(CONFIG_PIXBLOCKDSP) += riscv/pixblockdsp_rvv.o
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OBJS-$(CONFIG_VORBIS_DECODER) += riscv/vorbisdsp_init.o
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RVV-OBJS-$(CONFIG_VORBIS_DECODER) += riscv/vorbisdsp_rvv.o
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@ -29,10 +29,12 @@ void ff_extract_exponents_rvb(uint8_t *exp, int32_t *coef, int nb_coefs);
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av_cold void ff_ac3dsp_init_riscv(AC3DSPContext *c)
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{
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#if HAVE_RV
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int flags = av_get_cpu_flags();
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if (flags & AV_CPU_FLAG_RVB_ADDR) {
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if (flags & AV_CPU_FLAG_RVB_BASIC)
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c->extract_exponents = ff_extract_exponents_rvb;
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}
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#endif
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}
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@ -33,6 +33,7 @@ void ff_vector_clipf_rvv(float *dst, const float *src, int len, float min, float
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av_cold void ff_audiodsp_init_riscv(AudioDSPContext *c)
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{
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#if HAVE_RV
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int flags = av_get_cpu_flags();
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if (flags & AV_CPU_FLAG_RVF)
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@ -47,4 +48,5 @@ av_cold void ff_audiodsp_init_riscv(AudioDSPContext *c)
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c->vector_clipf = ff_vector_clipf_rvv;
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}
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#endif
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#endif
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}
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@ -30,6 +30,7 @@ void ff_bswap16_buf_rvv(uint16_t *dst, const uint16_t *src, int len);
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av_cold void ff_bswapdsp_init_riscv(BswapDSPContext *c)
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{
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#if HAVE_RV
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int flags = av_get_cpu_flags();
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if (flags & AV_CPU_FLAG_RVB_ADDR) {
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@ -42,4 +43,5 @@ av_cold void ff_bswapdsp_init_riscv(BswapDSPContext *c)
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c->bswap16_buf = ff_bswap16_buf_rvv;
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#endif
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}
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#endif
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}
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@ -43,6 +43,7 @@ av_cold void ff_pixblockdsp_init_riscv(PixblockDSPContext *c,
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AVCodecContext *avctx,
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unsigned high_bit_depth)
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{
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#if HAVE_RV
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int cpu_flags = av_get_cpu_flags();
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if (cpu_flags & AV_CPU_FLAG_RVI) {
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@ -62,4 +63,5 @@ av_cold void ff_pixblockdsp_init_riscv(PixblockDSPContext *c,
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c->diff_pixels_unaligned = c->diff_pixels = ff_diff_pixels_rvv;
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}
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#endif
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#endif
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}
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@ -1,3 +1,3 @@
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OBJS += riscv/rgb2rgb.o
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OBJS += riscv/rgb2rgb_rvb.o
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RV-OBJS += riscv/rgb2rgb_rvb.o
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RVV-OBJS += riscv/rgb2rgb_rvv.o
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@ -42,6 +42,7 @@ void ff_yuyvtoyuv422_rvv(uint8_t *ydst, uint8_t *udst, uint8_t *vdst,
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av_cold void rgb2rgb_init_riscv(void)
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{
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#if HAVE_RV
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int flags = av_get_cpu_flags();
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#if (__riscv_xlen == 64)
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@ -59,4 +60,5 @@ av_cold void rgb2rgb_init_riscv(void)
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yuyvtoyuv422 = ff_yuyvtoyuv422_rvv;
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}
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#endif
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#endif
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}
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@ -66,7 +66,7 @@ CHECKASMOBJS-$(CONFIG_AVUTIL) += $(AVUTILOBJS)
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CHECKASMOBJS-$(ARCH_AARCH64) += aarch64/checkasm.o
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CHECKASMOBJS-$(HAVE_ARMV5TE_EXTERNAL) += arm/checkasm.o
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CHECKASMOBJS-$(ARCH_RISCV) += riscv/checkasm.o
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CHECKASMOBJS-$(HAVE_RV) += riscv/checkasm.o
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CHECKASMOBJS-$(HAVE_X86ASM) += x86/checkasm.o
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CHECKASMOBJS += $(CHECKASMOBJS-yes) checkasm.o
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@ -212,11 +212,14 @@ void checkasm_checked_call(void *func, ...);
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void checkasm_set_function(void *);
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void *checkasm_get_wrapper(void);
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#if (__riscv_xlen == 64) && defined (__riscv_d)
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#if HAVE_RV && (__riscv_xlen == 64) && defined (__riscv_d)
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#define declare_new(ret, ...) \
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ret (*checked_call)(__VA_ARGS__) = checkasm_get_wrapper();
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#define call_new(...) \
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(checkasm_set_function(func_new), checked_call(__VA_ARGS__))
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#else
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#define declare_new(ret, ...)
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#define call_new(...) ((func_type *)func_new)(__VA_ARGS__)
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#endif
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#else
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#define declare_new(ret, ...)
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