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Merge commit 'f23d26a6864128001b03876b0b92fffe131f2060'
* commit 'f23d26a6864128001b03876b0b92fffe131f2060': h264: avoid using uninitialized memory in NEON chroma mc Merged-by: Michael Niedermayer <michaelni@gmx.at>
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commit
32cf26cc6a
@ -95,9 +95,10 @@ function ff_\type\()_\codec\()_chroma_mc8_neon, export=1
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b.gt 1b
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ret
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2: tst w6, w6
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add w12, w12, w6
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2: adds w12, w12, w6
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dup v0.8B, w4
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b.eq 5f
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tst w6, w6
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dup v1.8B, w12
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b.eq 4f
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@ -161,6 +162,33 @@ function ff_\type\()_\codec\()_chroma_mc8_neon, export=1
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st1 {v17.8B}, [x0], x2
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b.gt 4b
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ret
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5: ld1 {v4.8B}, [x1], x2
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ld1 {v5.8B}, [x1], x2
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prfm pldl1strm, [x1]
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subs w3, w3, #2
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umull v16.8H, v4.8B, v0.8B
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umull v17.8H, v5.8B, v0.8B
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prfm pldl1strm, [x1, x2]
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.ifc \codec,h264
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rshrn v16.8B, v16.8H, #6
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rshrn v17.8B, v17.8H, #6
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.else
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add v16.8H, v16.8H, v22.8H
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add v17.8H, v17.8H, v22.8H
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shrn v16.8B, v16.8H, #6
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shrn v17.8B, v17.8H, #6
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.endif
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.ifc \type,avg
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ld1 {v20.8B}, [x8], x2
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ld1 {v21.8B}, [x8], x2
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urhadd v16.8B, v16.8B, v20.8B
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urhadd v17.8B, v17.8B, v21.8B
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.endif
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st1 {v16.8B}, [x0], x2
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st1 {v17.8B}, [x0], x2
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b.gt 5b
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ret
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endfunc
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.endm
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@ -238,9 +266,10 @@ function ff_\type\()_\codec\()_chroma_mc4_neon, export=1
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b.gt 1b
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ret
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2: tst w6, w6
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add w12, w12, w6
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2: adds w12, w12, w6
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dup v30.8B, w4
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b.eq 5f
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tst w6, w6
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dup v31.8B, w12
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trn1 v0.2S, v30.2S, v31.2S
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trn2 v1.2S, v30.2S, v31.2S
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@ -303,6 +332,28 @@ function ff_\type\()_\codec\()_chroma_mc4_neon, export=1
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st1 {v16.S}[1], [x0], x2
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b.gt 4b
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ret
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5: ld1 {v4.S}[0], [x1], x2
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ld1 {v4.S}[1], [x1], x2
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umull v18.8H, v4.8B, v30.8B
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subs w3, w3, #2
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prfm pldl1strm, [x1]
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.ifc \codec,h264
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rshrn v16.8B, v18.8H, #6
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.else
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add v18.8H, v18.8H, v22.8H
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shrn v16.8B, v18.8H, #6
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.endif
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.ifc \type,avg
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ld1 {v20.S}[0], [x8], x2
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ld1 {v20.S}[1], [x8], x2
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urhadd v16.8B, v16.8B, v20.8B
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.endif
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prfm pldl1strm, [x1]
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st1 {v16.S}[0], [x0], x2
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st1 {v16.S}[1], [x0], x2
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b.gt 5b
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ret
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endfunc
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.endm
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@ -96,9 +96,10 @@ T cmp r7, #0
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pop {r4-r7, pc}
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2: tst r6, r6
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add r12, r12, r6
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2: adds r12, r12, r6
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vdup.8 d0, r4
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beq 5f
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tst r6, r6
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vdup.8 d1, r12
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beq 4f
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@ -163,6 +164,33 @@ T cmp r7, #0
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vst1.8 {d17}, [r0,:64], r2
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bgt 4b
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pop {r4-r7, pc}
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5: vld1.8 {d4}, [r1], r2
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vld1.8 {d5}, [r1], r2
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pld [r1]
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subs r3, r3, #2
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vmull.u8 q8, d4, d0
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vmull.u8 q9, d5, d0
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pld [r1, r2]
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.ifc \codec,h264
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vrshrn.u16 d16, q8, #6
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vrshrn.u16 d17, q9, #6
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.else
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vadd.u16 q8, q8, q11
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vadd.u16 q9, q9, q11
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vshrn.u16 d16, q8, #6
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vshrn.u16 d17, q9, #6
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.endif
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.ifc \type,avg
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vld1.8 {d20}, [lr,:64], r2
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vld1.8 {d21}, [lr,:64], r2
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vrhadd.u8 q8, q8, q10
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.endif
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vst1.8 {d16}, [r0,:64], r2
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vst1.8 {d17}, [r0,:64], r2
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bgt 5b
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pop {r4-r7, pc}
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endfunc
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.endm
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@ -245,9 +273,10 @@ T cmp r7, #0
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pop {r4-r7, pc}
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2: tst r6, r6
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add r12, r12, r6
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2: adds r12, r12, r6
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vdup.8 d0, r4
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beq 5f
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tst r6, r6
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vdup.8 d1, r12
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vtrn.32 d0, d1
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@ -310,6 +339,29 @@ T cmp r7, #0
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vst1.32 {d16[1]}, [r0,:32], r2
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bgt 4b
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pop {r4-r7, pc}
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5: vld1.32 {d4[0]}, [r1], r2
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vld1.32 {d4[1]}, [r1], r2
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vmull.u8 q8, d4, d0
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subs r3, r3, #2
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pld [r1]
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.ifc \codec,h264
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vrshrn.u16 d16, q8, #6
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.else
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vadd.u16 q8, q8, q11
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vshrn.u16 d16, q8, #6
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.endif
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.ifc \type,avg
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vld1.32 {d20[0]}, [lr,:32], r2
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vld1.32 {d20[1]}, [lr,:32], r2
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vrhadd.u8 d16, d16, d20
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.endif
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pld [r1]
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vst1.32 {d16[0]}, [r0,:32], r2
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vst1.32 {d16[1]}, [r0,:32], r2
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bgt 5b
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pop {r4-r7, pc}
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endfunc
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.endm
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