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configure: Add more fine-grained SSE CPU capabilities flags
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commit
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41
configure
vendored
41
configure
vendored
@ -245,7 +245,11 @@ Optimization options (experts only):
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--disable-mmx disable MMX optimizations
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--disable-mmx disable MMX optimizations
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--disable-mmxext disable MMXEXT optimizations
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--disable-mmxext disable MMXEXT optimizations
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--disable-sse disable SSE optimizations
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--disable-sse disable SSE optimizations
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--disable-sse2 disable SSE2 optimizations
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--disable-sse3 disable SSE3 optimizations
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--disable-ssse3 disable SSSE3 optimizations
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--disable-ssse3 disable SSSE3 optimizations
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--disable-sse4 disable SSE4 optimizations
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--disable-sse42 disable SSE4.2 optimizations
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--disable-avx disable AVX optimizations
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--disable-avx disable AVX optimizations
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--disable-fma4 disable FMA4 optimizations
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--disable-fma4 disable FMA4 optimizations
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--disable-armv5te disable armv5te optimizations
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--disable-armv5te disable armv5te optimizations
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@ -1061,26 +1065,34 @@ ARCH_LIST='
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x86_64
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x86_64
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'
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'
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ARCH_EXT_LIST='
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ARCH_EXT_LIST_X86='
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altivec
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amd3dnow
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amd3dnow
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amd3dnowext
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amd3dnowext
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avx
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fma4
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mmx
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mmxext
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sse
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sse2
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sse3
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sse4
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sse42
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ssse3
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'
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ARCH_EXT_LIST="
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$ARCH_EXT_LIST_X86
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altivec
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armv5te
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armv5te
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armv6
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armv6
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armv6t2
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armv6t2
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armvfp
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armvfp
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avx
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fma4
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mmi
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mmi
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mmx
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mmxext
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neon
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neon
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ppc4xx
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ppc4xx
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sse
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ssse3
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vfpv3
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vfpv3
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vis
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vis
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'
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"
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HAVE_LIST_PUB='
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HAVE_LIST_PUB='
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bigendian
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bigendian
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@ -1325,13 +1337,18 @@ ppc4xx_deps="ppc"
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vis_deps="sparc"
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vis_deps="sparc"
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x86_64_suggest="cmov fast_cmov"
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x86_64_suggest="cmov fast_cmov"
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amd3dnow_deps="mmx"
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amd3dnow_deps="mmx"
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amd3dnowext_deps="amd3dnow"
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amd3dnowext_deps="amd3dnow"
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mmx_deps="x86"
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mmx_deps="x86"
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mmxext_deps="mmx"
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mmxext_deps="mmx"
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sse_deps="mmx"
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sse_deps="mmxext"
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ssse3_deps="sse"
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sse2_deps="sse"
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avx_deps="ssse3"
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sse3_deps="sse2"
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ssse3_deps="sse3"
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sse4_deps="ssse3"
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sse42_deps="sse4"
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avx_deps="sse42"
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fma4_deps="avx"
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fma4_deps="avx"
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aligned_stack_if_any="ppc x86"
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aligned_stack_if_any="ppc x86"
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