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aarch64: vp9itxfm: Restructure the idct32 store macros
This avoids concatenation, which can't be used if the whole macro is wrapped within another macro. This is also arguably more readable. Signed-off-by: Martin Storsjö <martin@martin.st>
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@ -935,23 +935,23 @@ function idct32_1d_8x32_pass1_neon
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.macro store_rev a, b
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// There's no rev128 instruction, but we reverse each 64 bit
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// half, and then flip them using an ext with 8 bytes offset.
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rev64 v1.8h, v\b\().8h
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st1 {v\a\().8h}, [x0], #16
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rev64 v0.8h, v\a\().8h
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rev64 v1.8h, \b
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st1 {\a}, [x0], #16
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rev64 v0.8h, \a
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ext v1.16b, v1.16b, v1.16b, #8
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st1 {v\b\().8h}, [x0], #16
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st1 {\b}, [x0], #16
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ext v0.16b, v0.16b, v0.16b, #8
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st1 {v1.8h}, [x0], #16
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st1 {v0.8h}, [x0], #16
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.endm
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store_rev 16, 24
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store_rev 17, 25
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store_rev 18, 26
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store_rev 19, 27
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store_rev 20, 28
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store_rev 21, 29
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store_rev 22, 30
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store_rev 23, 31
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store_rev v16.8h, v24.8h
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store_rev v17.8h, v25.8h
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store_rev v18.8h, v26.8h
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store_rev v19.8h, v27.8h
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store_rev v20.8h, v28.8h
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store_rev v21.8h, v29.8h
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store_rev v22.8h, v30.8h
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store_rev v23.8h, v31.8h
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sub x0, x0, #512
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.purgem store_rev
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@ -977,14 +977,14 @@ function idct32_1d_8x32_pass1_neon
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// subtracted from the output.
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.macro store_rev a, b
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ld1 {v4.8h}, [x0]
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rev64 v1.8h, v\b\().8h
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add v4.8h, v4.8h, v\a\().8h
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rev64 v0.8h, v\a\().8h
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rev64 v1.8h, \b
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add v4.8h, v4.8h, \a
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rev64 v0.8h, \a
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st1 {v4.8h}, [x0], #16
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ext v1.16b, v1.16b, v1.16b, #8
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ld1 {v5.8h}, [x0]
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ext v0.16b, v0.16b, v0.16b, #8
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add v5.8h, v5.8h, v\b\().8h
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add v5.8h, v5.8h, \b
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st1 {v5.8h}, [x0], #16
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ld1 {v6.8h}, [x0]
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sub v6.8h, v6.8h, v1.8h
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@ -994,14 +994,14 @@ function idct32_1d_8x32_pass1_neon
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st1 {v7.8h}, [x0], #16
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.endm
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store_rev 31, 23
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store_rev 30, 22
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store_rev 29, 21
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store_rev 28, 20
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store_rev 27, 19
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store_rev 26, 18
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store_rev 25, 17
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store_rev 24, 16
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store_rev v31.8h, v23.8h
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store_rev v30.8h, v22.8h
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store_rev v29.8h, v21.8h
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store_rev v28.8h, v20.8h
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store_rev v27.8h, v19.8h
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store_rev v26.8h, v18.8h
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store_rev v25.8h, v17.8h
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store_rev v24.8h, v16.8h
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.purgem store_rev
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ret
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endfunc
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@ -1047,21 +1047,21 @@ function idct32_1d_8x32_pass2_neon
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.if \neg == 0
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ld1 {v4.8h}, [x2], x9
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ld1 {v5.8h}, [x2], x9
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add v4.8h, v4.8h, v\a\().8h
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add v4.8h, v4.8h, \a
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ld1 {v6.8h}, [x2], x9
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add v5.8h, v5.8h, v\b\().8h
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add v5.8h, v5.8h, \b
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ld1 {v7.8h}, [x2], x9
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add v6.8h, v6.8h, v\c\().8h
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add v7.8h, v7.8h, v\d\().8h
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add v6.8h, v6.8h, \c
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add v7.8h, v7.8h, \d
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.else
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ld1 {v4.8h}, [x2], x7
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ld1 {v5.8h}, [x2], x7
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sub v4.8h, v4.8h, v\a\().8h
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sub v4.8h, v4.8h, \a
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ld1 {v6.8h}, [x2], x7
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sub v5.8h, v5.8h, v\b\().8h
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sub v5.8h, v5.8h, \b
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ld1 {v7.8h}, [x2], x7
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sub v6.8h, v6.8h, v\c\().8h
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sub v7.8h, v7.8h, v\d\().8h
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sub v6.8h, v6.8h, \c
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sub v7.8h, v7.8h, \d
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.endif
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ld1 {v0.8b}, [x0], x1
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ld1 {v1.8b}, [x0], x1
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@ -1085,15 +1085,15 @@ function idct32_1d_8x32_pass2_neon
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st1 {v6.8b}, [x0], x1
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st1 {v7.8b}, [x0], x1
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.endm
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load_acc_store 31, 30, 29, 28
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load_acc_store 27, 26, 25, 24
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load_acc_store 23, 22, 21, 20
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load_acc_store 19, 18, 17, 16
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load_acc_store v31.8h, v30.8h, v29.8h, v28.8h
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load_acc_store v27.8h, v26.8h, v25.8h, v24.8h
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load_acc_store v23.8h, v22.8h, v21.8h, v20.8h
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load_acc_store v19.8h, v18.8h, v17.8h, v16.8h
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sub x2, x2, x9
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load_acc_store 16, 17, 18, 19, 1
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load_acc_store 20, 21, 22, 23, 1
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load_acc_store 24, 25, 26, 27, 1
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load_acc_store 28, 29, 30, 31, 1
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load_acc_store v16.8h, v17.8h, v18.8h, v19.8h, 1
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load_acc_store v20.8h, v21.8h, v22.8h, v23.8h, 1
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load_acc_store v24.8h, v25.8h, v26.8h, v27.8h, 1
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load_acc_store v28.8h, v29.8h, v30.8h, v31.8h, 1
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.purgem load_acc_store
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ret
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endfunc
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