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Originally committed as revision 105 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Fabrice Bellard
parent
694ec0612b
commit
64ccc83c2b
@ -1,143 +0,0 @@
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//////////////////////////////////////////////////////////////////////////////
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//
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// fdctam32.c - AP922 MMX(3D-Now) forward-DCT
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// ----------
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// Intel Application Note AP-922 - fast, precise implementation of DCT
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// http://developer.intel.com/vtune/cbts/appnotes.htm
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// ----------
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//
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// This routine uses a 3D-Now/MMX enhancement to increase the
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// accuracy of the fdct_col_4 macro. The dct_col function uses 3D-Now's
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// PMHULHRW instead of MMX's PMHULHW(and POR). The substitution improves
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// accuracy very slightly with performance penalty. If the target CPU
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// does not support 3D-Now, then this function cannot be executed.
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// fdctmm32.c contains the standard MMX implementation of AP-922.
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//
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// For a fast, precise MMX implementation of inverse-DCT
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// visit http://www.elecard.com/peter
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//
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// v1.0 07/22/2000 (initial release)
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// Initial release of AP922 MMX(3D-Now) forward_DCT.
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// This code was tested with Visual C++ 6.0Pro + service_pack4 +
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// processor_pack_beta! If you have the processor_pack_beta, you can
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// remove the #include for amd3dx.h, and substitute the 'normal'
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// assembly lines for the macro'd versions. Otherwise, this
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// code should compile 'as is', under Visual C++ 6.0 Pro.
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//
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// liaor@iname.com http://members.tripod.com/~liaor
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//////////////////////////////////////////////////////////////////////////////
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#include <inttypes.h>
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//////////////////////////////////////////////////////////////////////
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//
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// constants for the forward DCT
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// -----------------------------
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//
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// Be sure to check that your compiler is aligning all constants to QWORD
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// (8-byte) memory boundaries! Otherwise the unaligned memory access will
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// severely stall MMX execution.
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//
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//////////////////////////////////////////////////////////////////////
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#define BITS_FRW_ACC 3 //; 2 or 3 for accuracy
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#define SHIFT_FRW_COL BITS_FRW_ACC
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#define SHIFT_FRW_ROW (BITS_FRW_ACC + 17)
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//#define RND_FRW_ROW (262144 * (BITS_FRW_ACC - 1)) //; 1 << (SHIFT_FRW_ROW-1)
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#define RND_FRW_ROW (1 << (SHIFT_FRW_ROW-1))
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//#define RND_FRW_COL (2 * (BITS_FRW_ACC - 1)) //; 1 << (SHIFT_FRW_COL-1)
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#define RND_FRW_COL (1 << (SHIFT_FRW_COL-1))
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//concatenated table, for forward DCT transformation
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const int16_t fdct_tg_all_16[] = {
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13036, 13036, 13036, 13036, // tg * (2<<16) + 0.5
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27146, 27146, 27146, 27146, // tg * (2<<16) + 0.5
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-21746, -21746, -21746, -21746, // tg * (2<<16) + 0.5
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-19195, -19195, -19195, -19195, //cos * (2<<16) + 0.5
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23170, 23170, 23170, 23170 }; //cos * (2<<15) + 0.5
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const long long fdct_one_corr = 0x0001000100010001LL;
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const long fdct_r_row[2] = {RND_FRW_ROW, RND_FRW_ROW };
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const int16_t tab_frw_01234567[] = { // forward_dct coeff table
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//row0
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16384, 16384, 21407, -8867, // w09 w01 w08 w00
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16384, 16384, 8867, -21407, // w13 w05 w12 w04
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16384, -16384, 8867, 21407, // w11 w03 w10 w02
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-16384, 16384, -21407, -8867, // w15 w07 w14 w06
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22725, 12873, 19266, -22725, // w22 w20 w18 w16
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19266, 4520, -4520, -12873, // w23 w21 w19 w17
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12873, 4520, 4520, 19266, // w30 w28 w26 w24
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-22725, 19266, -12873, -22725, // w31 w29 w27 w25
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//row1
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22725, 22725, 29692, -12299, // w09 w01 w08 w00
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22725, 22725, 12299, -29692, // w13 w05 w12 w04
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22725, -22725, 12299, 29692, // w11 w03 w10 w02
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-22725, 22725, -29692, -12299, // w15 w07 w14 w06
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31521, 17855, 26722, -31521, // w22 w20 w18 w16
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26722, 6270, -6270, -17855, // w23 w21 w19 w17
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17855, 6270, 6270, 26722, // w30 w28 w26 w24
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-31521, 26722, -17855, -31521, // w31 w29 w27 w25
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//row2
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21407, 21407, 27969, -11585, // w09 w01 w08 w00
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21407, 21407, 11585, -27969, // w13 w05 w12 w04
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21407, -21407, 11585, 27969, // w11 w03 w10 w02
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-21407, 21407, -27969, -11585, // w15 w07 w14 w06
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29692, 16819, 25172, -29692, // w22 w20 w18 w16
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25172, 5906, -5906, -16819, // w23 w21 w19 w17
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16819, 5906, 5906, 25172, // w30 w28 w26 w24
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-29692, 25172, -16819, -29692, // w31 w29 w27 w25
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//row3
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19266, 19266, 25172, -10426, // w09 w01 w08 w00
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19266, 19266, 10426, -25172, // w13 w05 w12 w04
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19266, -19266, 10426, 25172, // w11 w03 w10 w02
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-19266, 19266, -25172, -10426, // w15 w07 w14 w06,
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26722, 15137, 22654, -26722, // w22 w20 w18 w16
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22654, 5315, -5315, -15137, // w23 w21 w19 w17
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15137, 5315, 5315, 22654, // w30 w28 w26 w24
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-26722, 22654, -15137, -26722, // w31 w29 w27 w25,
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//row4
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16384, 16384, 21407, -8867, // w09 w01 w08 w00
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16384, 16384, 8867, -21407, // w13 w05 w12 w04
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16384, -16384, 8867, 21407, // w11 w03 w10 w02
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-16384, 16384, -21407, -8867, // w15 w07 w14 w06
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22725, 12873, 19266, -22725, // w22 w20 w18 w16
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19266, 4520, -4520, -12873, // w23 w21 w19 w17
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12873, 4520, 4520, 19266, // w30 w28 w26 w24
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-22725, 19266, -12873, -22725, // w31 w29 w27 w25
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//row5
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19266, 19266, 25172, -10426, // w09 w01 w08 w00
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19266, 19266, 10426, -25172, // w13 w05 w12 w04
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19266, -19266, 10426, 25172, // w11 w03 w10 w02
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-19266, 19266, -25172, -10426, // w15 w07 w14 w06
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26722, 15137, 22654, -26722, // w22 w20 w18 w16
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22654, 5315, -5315, -15137, // w23 w21 w19 w17
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15137, 5315, 5315, 22654, // w30 w28 w26 w24
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-26722, 22654, -15137, -26722, // w31 w29 w27 w25
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//row6
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21407, 21407, 27969, -11585, // w09 w01 w08 w00
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21407, 21407, 11585, -27969, // w13 w05 w12 w04
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21407, -21407, 11585, 27969, // w11 w03 w10 w02
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-21407, 21407, -27969, -11585, // w15 w07 w14 w06,
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29692, 16819, 25172, -29692, // w22 w20 w18 w16
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25172, 5906, -5906, -16819, // w23 w21 w19 w17
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16819, 5906, 5906, 25172, // w30 w28 w26 w24
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-29692, 25172, -16819, -29692, // w31 w29 w27 w25,
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//row7
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22725, 22725, 29692, -12299, // w09 w01 w08 w00
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22725, 22725, 12299, -29692, // w13 w05 w12 w04
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22725, -22725, 12299, 29692, // w11 w03 w10 w02
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-22725, 22725, -29692, -12299, // w15 w07 w14 w06,
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31521, 17855, 26722, -31521, // w22 w20 w18 w16
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26722, 6270, -6270, -17855, // w23 w21 w19 w17
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17855, 6270, 6270, 26722, // w30 w28 w26 w24
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-31521, 26722, -17855, -31521 // w31 w29 w27 w25
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};
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