virtualenv/FFmpeg
1
0
Fork 0
mirror of https://github.com/FFmpeg/FFmpeg.git synced 2025-08-15 14:13:16 +02:00
Code Issues Releases Activity

avcodec/x86/hevc_mc: add qpel_h32_8_avx512icl

Browse Source 
ff_hevc_put_hevc_qpel_h32_8_sse4       14122151
ff_hevc_put_hevc_qpel_h32_8_avx2        9337675
ff_hevc_put_hevc_qpel_h32_8_avx512icl   6424654

Reviewed-by: Henrik Gramner <henrik@gramner.com>
Signed-off-by: Wu Jianhua <jianhua.wu@intel.com>
This commit is contained in:
Wu Jianhua
2022-03-11 15:52:12 +08:00
committed by Haihao Xiang
parent 6fbb8cc8ad
commit 68437bf169
3 changed files with 16 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
libavcodec/x86/hevc_mc.asm
View File

@@ -91,6 +91,7 @@ QPEL_TABLE 4, 1, b, avx512icl_h
QPEL_TABLE 8, 1, b, avx512icl_h QPEL_TABLE 8, 1, b, avx512icl_h
QPEL_TABLE 8, 1, d, avx512icl_v QPEL_TABLE 8, 1, d, avx512icl_v
QPEL_TABLE 16, 1, b, avx512icl_h QPEL_TABLE 16, 1, b, avx512icl_h
QPEL_TABLE 32, 1, b, avx512icl_h
pb_qpel_shuffle_index: db 0, 1, 2, 3 pb_qpel_shuffle_index: db 0, 1, 2, 3
db 1, 2, 3, 4 db 1, 2, 3, 4
@@ -1736,12 +1737,17 @@ HEVC_PUT_HEVC_QPEL_HV 16, 10
; required: m0-m5 ; required: m0-m5
; %1: dst register index ; %1: dst register index
; %2: name for src ; %2: name for src
%macro QPEL_H_LOAD_COMPUTE 2 ; %3: optional offset
%macro QPEL_H_LOAD_COMPUTE 2-3
%assign %%offset 0
%if %0 == 3
%assign %%offset %3
%endif
pxor m%1, m%1 pxor m%1, m%1
%if mmsize == 64 %if mmsize == 64
movu ym4, [%2q - 3] movu ym4, [%2q + %%offset - 3]
%else %else
movu xm4, [%2q - 3] movu xm4, [%2q + %%offset - 3]
%endif %endif
vpermb m5, m2, m4 vpermb m5, m2, m4
vpermb m4, m3, m4 vpermb m4, m3, m4
@@ -1760,6 +1766,10 @@ cglobal hevc_put_hevc_qpel_h%1_%2, 5, 6, 8, dst, src, srcstride, height, mx, tmp
movq [dstq], xm6 movq [dstq], xm6
%else %else
vpmovdw [dstq], m6 vpmovdw [dstq], m6
%endif
%if %1 == 32
QPEL_H_LOAD_COMPUTE 7, src, 16
vpmovdw [dstq + 32], m7
%endif %endif
LOOP_END dst, src, srcstride LOOP_END dst, src, srcstride
RET RET
@@ -1837,6 +1847,7 @@ HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 8, 8
INIT_ZMM avx512icl INIT_ZMM avx512icl
HEVC_PUT_HEVC_QPEL_AVX512ICL 16, 8 HEVC_PUT_HEVC_QPEL_AVX512ICL 16, 8
HEVC_PUT_HEVC_QPEL_AVX512ICL 32, 8
%endif %endif
%endif %endif

1
libavcodec/x86/hevcdsp.h
View File

@@ -236,6 +236,7 @@ WEIGHTING_PROTOTYPES(12, sse4);
void ff_hevc_put_hevc_qpel_h4_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width); void ff_hevc_put_hevc_qpel_h4_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width); void ff_hevc_put_hevc_qpel_h8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h16_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width); void ff_hevc_put_hevc_qpel_h16_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_h32_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width); void ff_hevc_put_hevc_qpel_hv8_8_avx512icl(int16_t *dst, uint8_t *_src, ptrdiff_t _srcstride, int height, intptr_t mx, intptr_t my, int width);
/////////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////////

1
libavcodec/x86/hevcdsp_init.c
View File

@@ -882,6 +882,7 @@ void ff_hevc_dsp_init_x86(HEVCDSPContext *c, const int bit_depth)
c->put_hevc_qpel[1][0][1] = ff_hevc_put_hevc_qpel_h4_8_avx512icl; c->put_hevc_qpel[1][0][1] = ff_hevc_put_hevc_qpel_h4_8_avx512icl;
c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl; c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl;
c->put_hevc_qpel[5][0][1] = ff_hevc_put_hevc_qpel_h16_8_avx512icl; c->put_hevc_qpel[5][0][1] = ff_hevc_put_hevc_qpel_h16_8_avx512icl;
c->put_hevc_qpel[7][0][1] = ff_hevc_put_hevc_qpel_h32_8_avx512icl;
c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl; c->put_hevc_qpel[3][1][1] = ff_hevc_put_hevc_qpel_hv8_8_avx512icl;
} }
} else if (bit_depth == 10) { } else if (bit_depth == 10) {