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Fix segfaults in VP8 SIMD code on Win64 (and FATE/win64 failures).
Originally committed as revision 24871 to svn://svn.ffmpeg.org/ffmpeg/trunk
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@ -211,7 +211,7 @@ cglobal put_vp8_epel%1_h6_ssse3, 6, 6, %2
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; go to next line
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; go to next line
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add r0, r1
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add r0, r1
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add r2, r3
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add r2, r3
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dec r4 ; next row
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dec r4d ; next row
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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@ -242,7 +242,7 @@ cglobal put_vp8_epel%1_h4_ssse3, 6, 6, %3
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; go to next line
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; go to next line
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add r0, r1
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add r0, r1
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add r2, r3
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add r2, r3
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dec r4 ; next row
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dec r4d ; next row
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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@ -281,7 +281,7 @@ cglobal put_vp8_epel%1_v4_ssse3, 7, 7, %2
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; go to next line
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; go to next line
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add r0, r1
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add r0, r1
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add r2, r3
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add r2, r3
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dec r4 ; next row
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dec r4d ; next row
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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@ -328,7 +328,7 @@ cglobal put_vp8_epel%1_v6_ssse3, 7, 7, %2
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; go to next line
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; go to next line
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add r0, r1
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add r0, r1
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add r2, r3
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add r2, r3
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dec r4 ; next row
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dec r4d ; next row
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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%endmacro
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%endmacro
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@ -381,7 +381,7 @@ cglobal put_vp8_epel4_h4_mmxext, 6, 6
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; go to next line
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; go to next line
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add r0, r1
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add r0, r1
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add r2, r3
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add r2, r3
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dec r4 ; next row
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dec r4d ; next row
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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@ -438,7 +438,7 @@ cglobal put_vp8_epel4_h6_mmxext, 6, 6
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; go to next line
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; go to next line
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add r0, r1
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add r0, r1
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add r2, r3
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add r2, r3
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dec r4 ; next row
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dec r4d ; next row
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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@ -486,7 +486,7 @@ cglobal put_vp8_epel8_h4_sse2, 6, 6, 10
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; go to next line
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; go to next line
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add r0, r1
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add r0, r1
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add r2, r3
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add r2, r3
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dec r4 ; next row
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dec r4d ; next row
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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@ -548,7 +548,7 @@ cglobal put_vp8_epel8_h6_sse2, 6, 6, 14
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; go to next line
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; go to next line
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add r0, r1
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add r0, r1
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add r2, r3
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add r2, r3
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dec r4 ; next row
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dec r4d ; next row
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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@ -601,7 +601,7 @@ cglobal put_vp8_epel%2_v4_%1, 7, 7, %3
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; go to next line
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; go to next line
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add r0, r1
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add r0, r1
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add r2, r3
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add r2, r3
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dec r4 ; next row
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dec r4d ; next row
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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@ -666,7 +666,7 @@ cglobal put_vp8_epel%2_v6_%1, 7, 7, %3
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; go to next line
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; go to next line
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add r0, r1
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add r0, r1
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add r2, r3
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add r2, r3
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dec r4 ; next row
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dec r4d ; next row
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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%endmacro
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%endmacro
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@ -718,7 +718,7 @@ cglobal put_vp8_bilinear%2_v_%1, 7,7,%3
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lea r0, [r0+r1*2]
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lea r0, [r0+r1*2]
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lea r2, [r2+r3*2]
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lea r2, [r2+r3*2]
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sub r4, 2
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sub r4d, 2
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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@ -764,7 +764,7 @@ cglobal put_vp8_bilinear%2_h_%1, 7,7,%3
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lea r0, [r0+r1*2]
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lea r0, [r0+r1*2]
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lea r2, [r2+r3*2]
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lea r2, [r2+r3*2]
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sub r4, 2
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sub r4d, 2
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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%endmacro
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%endmacro
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@ -807,7 +807,7 @@ cglobal put_vp8_bilinear%1_v_ssse3, 7,7
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lea r0, [r0+r1*2]
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lea r0, [r0+r1*2]
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lea r2, [r2+r3*2]
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lea r2, [r2+r3*2]
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sub r4, 2
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sub r4d, 2
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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@ -843,7 +843,7 @@ cglobal put_vp8_bilinear%1_h_ssse3, 7,7
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lea r0, [r0+r1*2]
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lea r0, [r0+r1*2]
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lea r2, [r2+r3*2]
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lea r2, [r2+r3*2]
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sub r4, 2
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sub r4d, 2
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jg .nextrow
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jg .nextrow
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REP_RET
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REP_RET
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%endmacro
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%endmacro
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