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x86: fft: convert sse inline asm to yasm
This commit is contained in:
Mans Rullgard
parent
8123e0901f
commit
8299260470
@ -39,7 +39,6 @@ YASM-OBJS-$(CONFIG_DCT) += x86/dct32_sse.o
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YASM-OBJS-$(CONFIG_ENCODERS) += x86/dsputilenc_yasm.o
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YASM-OBJS-$(CONFIG_ENCODERS) += x86/dsputilenc_yasm.o
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YASM-OBJS-FFT-$(HAVE_AMD3DNOW) += x86/fft_3dn.o
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YASM-OBJS-FFT-$(HAVE_AMD3DNOW) += x86/fft_3dn.o
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YASM-OBJS-FFT-$(HAVE_AMD3DNOWEXT) += x86/fft_3dn2.o
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YASM-OBJS-FFT-$(HAVE_AMD3DNOWEXT) += x86/fft_3dn2.o
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YASM-OBJS-FFT-$(HAVE_SSE) += x86/fft_sse.o
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YASM-OBJS-$(CONFIG_FFT) += x86/fft_mmx.o \
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YASM-OBJS-$(CONFIG_FFT) += x86/fft_mmx.o \
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$(YASM-OBJS-FFT-yes)
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$(YASM-OBJS-FFT-yes)
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YASM-OBJS-$(CONFIG_H264CHROMA) += x86/h264_chromamc.o \
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YASM-OBJS-$(CONFIG_H264CHROMA) += x86/h264_chromamc.o \
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@ -45,6 +45,10 @@ struc FFTContext
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.mdctbits: resd 1
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.mdctbits: resd 1
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.tcos: pointer 1
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.tcos: pointer 1
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.tsin: pointer 1
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.tsin: pointer 1
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.fftperm: pointer 1
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.fftcalc: pointer 1
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.imdctcalc:pointer 1
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.imdcthalf:pointer 1
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endstruc
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endstruc
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SECTION_RODATA
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SECTION_RODATA
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@ -65,6 +69,7 @@ perm1: dd 0x00, 0x02, 0x03, 0x01, 0x03, 0x00, 0x02, 0x01
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perm2: dd 0x00, 0x01, 0x02, 0x03, 0x01, 0x00, 0x02, 0x03
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perm2: dd 0x00, 0x01, 0x02, 0x03, 0x01, 0x00, 0x02, 0x03
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ps_p1p1m1p1root2: dd 1.0, 1.0, -1.0, 1.0, M_SQRT1_2, M_SQRT1_2, M_SQRT1_2, M_SQRT1_2
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ps_p1p1m1p1root2: dd 1.0, 1.0, -1.0, 1.0, M_SQRT1_2, M_SQRT1_2, M_SQRT1_2, M_SQRT1_2
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ps_m1m1p1m1p1m1m1m1: dd 1<<31, 1<<31, 0, 1<<31, 0, 1<<31, 1<<31, 1<<31
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ps_m1m1p1m1p1m1m1m1: dd 1<<31, 1<<31, 0, 1<<31, 0, 1<<31, 1<<31, 1<<31
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ps_m1m1m1m1: times 4 dd 1<<31
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ps_m1p1: dd 1<<31, 0
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ps_m1p1: dd 1<<31, 0
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%assign i 16
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%assign i 16
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@ -532,6 +537,16 @@ DEFINE_ARGS z, w, n, o1, o3
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rep ret
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rep ret
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%endmacro
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%endmacro
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%macro FFT_DISPATCH 2; clobbers 5 GPRs, 8 XMMs
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lea r2, [dispatch_tab%1]
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mov r2, [r2 + (%2q-2)*gprsize]
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%ifdef PIC
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lea r3, [$$]
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add r2, r3
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%endif
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call r2
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%endmacro ; FFT_DISPATCH
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INIT_YMM avx
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INIT_YMM avx
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%if HAVE_AVX
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%if HAVE_AVX
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@ -548,6 +563,14 @@ INIT_YMM avx
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DECL_PASS pass_avx, PASS_BIG 1
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DECL_PASS pass_avx, PASS_BIG 1
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DECL_PASS pass_interleave_avx, PASS_BIG 0
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DECL_PASS pass_interleave_avx, PASS_BIG 0
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cglobal fft_calc, 2,5,8
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mov r3d, [r0 + FFTContext.nbits]
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mov r0, r1
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mov r1, r3
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FFT_DISPATCH _interleave %+ SUFFIX, r1
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REP_RET
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%endif
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%endif
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INIT_XMM sse
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INIT_XMM sse
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@ -565,6 +588,112 @@ INIT_XMM sse
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DECL_PASS pass_sse, PASS_BIG 1
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DECL_PASS pass_sse, PASS_BIG 1
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DECL_PASS pass_interleave_sse, PASS_BIG 0
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DECL_PASS pass_interleave_sse, PASS_BIG 0
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cglobal fft_calc, 2,5,8
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mov r3d, [r0 + FFTContext.nbits]
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PUSH r1
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PUSH r3
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mov r0, r1
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mov r1, r3
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FFT_DISPATCH _interleave %+ SUFFIX, r1
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POP rcx
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POP r4
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cmp rcx, 4
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jg .end
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mov r2, -1
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add rcx, 3
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shl r2, cl
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sub r4, r2
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.loop
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movaps xmm0, [r4 + r2]
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movaps xmm1, xmm0
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unpcklps xmm0, [r4 + r2 + 16]
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unpckhps xmm1, [r4 + r2 + 16]
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movaps [r4 + r2], xmm0
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movaps [r4 + r2 + 16], xmm1
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add r2, 32
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jl .loop
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.end:
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REP_RET
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cextern_naked memcpy
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cglobal fft_permute, 2,7,1
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mov r4, [r0 + FFTContext.revtab]
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mov r5, [r0 + FFTContext.tmpbuf]
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mov ecx, [r0 + FFTContext.nbits]
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mov r2, 1
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shl r2, cl
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xor r0, r0
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%if ARCH_X86_32
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mov r1, r1m
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%endif
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.loop:
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movaps xmm0, [r1 + 8*r0]
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movzx r6, word [r4 + 2*r0]
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movzx r3, word [r4 + 2*r0 + 2]
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movlps [r5 + 8*r6], xmm0
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movhps [r5 + 8*r3], xmm0
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add r0, 2
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cmp r0, r2
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jl .loop
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shl r2, 3
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%if ARCH_X86_64
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mov r0, r1
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mov r1, r5
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%else
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push r2
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push r5
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push r1
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%endif
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%if ARCH_X86_64 && WIN64 == 0
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jmp memcpy
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%else
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call memcpy
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%if ARCH_X86_32
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add esp, 12
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%endif
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REP_RET
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%endif
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cglobal imdct_calc, 3,5,3
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mov r3d, [r0 + FFTContext.mdctsize]
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mov r4, [r0 + FFTContext.imdcthalf]
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add r1, r3
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PUSH r3
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PUSH r1
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%if ARCH_X86_32
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push r2
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push r1
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push r0
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%else
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sub rsp, 8
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%endif
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call r4
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%if ARCH_X86_32
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add esp, 12
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%else
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add rsp, 8
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%endif
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POP r1
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POP r3
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lea r0, [r1 + 2*r3]
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mov r2, r3
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sub r3, 16
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neg r2
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movaps xmm2, [ps_m1m1m1m1]
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.loop:
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movaps xmm0, [r1 + r3]
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movaps xmm1, [r0 + r2]
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shufps xmm0, xmm0, 0x1b
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shufps xmm1, xmm1, 0x1b
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xorps xmm0, xmm2
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movaps [r0 + r3], xmm1
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movaps [r1 + r2], xmm0
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sub r3, 16
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add r2, 16
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jl .loop
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REP_RET
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INIT_MMX 3dnow
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INIT_MMX 3dnow
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%define mulps pfmul
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%define mulps pfmul
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%define addps pfadd
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%define addps pfadd
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@ -582,16 +711,6 @@ DECL_PASS pass_interleave_3dnow, PASS_BIG 0
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%define SECTION_REL
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%define SECTION_REL
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%endif
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%endif
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%macro FFT_DISPATCH 2; clobbers 5 GPRs, 8 XMMs
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lea r2, [dispatch_tab%1]
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mov r2, [r2 + (%2q-2)*gprsize]
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%ifdef PIC
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lea r3, [$$]
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add r2, r3
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%endif
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call r2
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%endmacro ; FFT_DISPATCH
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%macro DECL_FFT 1-2 ; nbits, suffix
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%macro DECL_FFT 1-2 ; nbits, suffix
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%ifidn %0, 1
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%ifidn %0, 1
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%xdefine fullsuffix SUFFIX
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%xdefine fullsuffix SUFFIX
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@ -1,110 +0,0 @@
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/*
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* FFT/MDCT transform with SSE optimizations
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* Copyright (c) 2008 Loren Merritt
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*
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* This file is part of Libav.
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*
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* Libav is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* Libav is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with Libav; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/x86_cpu.h"
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#include "libavcodec/dsputil.h"
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#include "fft.h"
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#include "config.h"
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DECLARE_ASM_CONST(16, unsigned int, ff_m1m1m1m1)[4] =
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{ 1U << 31, 1U << 31, 1U << 31, 1U << 31 };
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void ff_fft_dispatch_sse(FFTComplex *z, int nbits);
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void ff_fft_dispatch_interleave_sse(FFTComplex *z, int nbits);
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void ff_fft_dispatch_interleave_avx(FFTComplex *z, int nbits);
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#if HAVE_AVX
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void ff_fft_calc_avx(FFTContext *s, FFTComplex *z)
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{
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ff_fft_dispatch_interleave_avx(z, s->nbits);
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}
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#endif
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void ff_fft_calc_sse(FFTContext *s, FFTComplex *z)
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{
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int n = 1 << s->nbits;
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ff_fft_dispatch_interleave_sse(z, s->nbits);
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if(n <= 16) {
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x86_reg i = -8*n;
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__asm__ volatile(
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"1: \n"
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"movaps (%0,%1), %%xmm0 \n"
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"movaps %%xmm0, %%xmm1 \n"
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"unpcklps 16(%0,%1), %%xmm0 \n"
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"unpckhps 16(%0,%1), %%xmm1 \n"
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"movaps %%xmm0, (%0,%1) \n"
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"movaps %%xmm1, 16(%0,%1) \n"
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"add $32, %0 \n"
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"jl 1b \n"
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:"+r"(i)
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:"r"(z+n)
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:"memory"
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);
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}
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}
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void ff_fft_permute_sse(FFTContext *s, FFTComplex *z)
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{
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int n = 1 << s->nbits;
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int i;
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for(i=0; i<n; i+=2) {
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__asm__ volatile(
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"movaps %2, %%xmm0 \n"
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"movlps %%xmm0, %0 \n"
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"movhps %%xmm0, %1 \n"
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:"=m"(s->tmp_buf[s->revtab[i]]),
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"=m"(s->tmp_buf[s->revtab[i+1]])
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:"m"(z[i])
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);
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}
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memcpy(z, s->tmp_buf, n*sizeof(FFTComplex));
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}
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void ff_imdct_calc_sse(FFTContext *s, FFTSample *output, const FFTSample *input)
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{
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x86_reg j, k;
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long n = s->mdct_size;
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long n4 = n >> 2;
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s->imdct_half(s, output + n4, input);
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j = -n;
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k = n-16;
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__asm__ volatile(
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"movaps "MANGLE(ff_m1m1m1m1)", %%xmm7 \n"
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"1: \n"
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"movaps (%2,%1), %%xmm0 \n"
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"movaps (%3,%0), %%xmm1 \n"
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"shufps $0x1b, %%xmm0, %%xmm0 \n"
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"shufps $0x1b, %%xmm1, %%xmm1 \n"
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"xorps %%xmm7, %%xmm0 \n"
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"movaps %%xmm1, (%3,%1) \n"
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"movaps %%xmm0, (%2,%0) \n"
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"sub $16, %1 \n"
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"add $16, %0 \n"
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"jl 1b \n"
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:"+r"(j), "+r"(k)
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:"r"(output+n4), "r"(output+n4*3)
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XMM_CLOBBERS_ONLY("%xmm0", "%xmm1", "%xmm7")
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);
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}
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