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avcodec/aacdec: fix compilation under soft float MIPS
Place HAVE_MIPSFPU further up so that functions that use floating point ASM are defined away. Otherwise compilation failures result when soft float in enabled on the toolchain. Signed-off-by: Rosen Penev <rosenp@gmail.com>
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@ -59,6 +59,7 @@
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#include "libavutil/mips/asmdefs.h"
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#include "libavutil/mips/asmdefs.h"
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#if HAVE_INLINE_ASM
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#if HAVE_INLINE_ASM
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#if HAVE_MIPSFPU
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static av_always_inline void float_copy(float *dst, const float *src, int count)
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static av_always_inline void float_copy(float *dst, const float *src, int count)
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{
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{
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// Copy 'count' floats from src to dst
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// Copy 'count' floats from src to dst
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@ -282,7 +283,6 @@ static void apply_ltp_mips(AACContext *ac, SingleChannelElement *sce)
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}
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}
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}
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}
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#if HAVE_MIPSFPU
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static av_always_inline void fmul_and_reverse(float *dst, const float *src0, const float *src1, int count)
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static av_always_inline void fmul_and_reverse(float *dst, const float *src0, const float *src1, int count)
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{
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{
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/* Multiply 'count' floats in src0 by src1 and store the results in dst in reverse */
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/* Multiply 'count' floats in src0 by src1 and store the results in dst in reverse */
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@ -433,9 +433,9 @@ static void update_ltp_mips(AACContext *ac, SingleChannelElement *sce)
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void ff_aacdec_init_mips(AACContext *c)
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void ff_aacdec_init_mips(AACContext *c)
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{
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{
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#if HAVE_INLINE_ASM
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#if HAVE_INLINE_ASM
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#if HAVE_MIPSFPU
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c->imdct_and_windowing = imdct_and_windowing_mips;
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c->imdct_and_windowing = imdct_and_windowing_mips;
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c->apply_ltp = apply_ltp_mips;
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c->apply_ltp = apply_ltp_mips;
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#if HAVE_MIPSFPU
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c->update_ltp = update_ltp_mips;
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c->update_ltp = update_ltp_mips;
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#endif /* HAVE_MIPSFPU */
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#endif /* HAVE_MIPSFPU */
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#endif /* HAVE_INLINE_ASM */
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#endif /* HAVE_INLINE_ASM */
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@ -57,6 +57,7 @@
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#include "libavutil/mips/asmdefs.h"
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#include "libavutil/mips/asmdefs.h"
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#if HAVE_INLINE_ASM
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#if HAVE_INLINE_ASM
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#if HAVE_MIPSFPU
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static void ps_hybrid_analysis_ileave_mips(float (*out)[32][2], float L[2][38][64],
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static void ps_hybrid_analysis_ileave_mips(float (*out)[32][2], float L[2][38][64],
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int i, int len)
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int i, int len)
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{
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{
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@ -187,7 +188,6 @@ static void ps_hybrid_synthesis_deint_mips(float out[2][38][64],
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}
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}
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}
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}
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#if HAVE_MIPSFPU
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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static void ps_add_squares_mips(float *dst, const float (*src)[2], int n)
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static void ps_add_squares_mips(float *dst, const float (*src)[2], int n)
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{
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{
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@ -450,9 +450,9 @@ static void ps_stereo_interpolate_mips(float (*l)[2], float (*r)[2],
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void ff_psdsp_init_mips(PSDSPContext *s)
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void ff_psdsp_init_mips(PSDSPContext *s)
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{
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{
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#if HAVE_INLINE_ASM
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#if HAVE_INLINE_ASM
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#if HAVE_MIPSFPU
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s->hybrid_analysis_ileave = ps_hybrid_analysis_ileave_mips;
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s->hybrid_analysis_ileave = ps_hybrid_analysis_ileave_mips;
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s->hybrid_synthesis_deint = ps_hybrid_synthesis_deint_mips;
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s->hybrid_synthesis_deint = ps_hybrid_synthesis_deint_mips;
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#if HAVE_MIPSFPU
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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s->add_squares = ps_add_squares_mips;
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s->add_squares = ps_add_squares_mips;
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s->mul_pair_single = ps_mul_pair_single_mips;
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s->mul_pair_single = ps_mul_pair_single_mips;
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@ -58,6 +58,7 @@
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#define ENVELOPE_ADJUSTMENT_OFFSET 2
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#define ENVELOPE_ADJUSTMENT_OFFSET 2
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#if HAVE_INLINE_ASM
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#if HAVE_INLINE_ASM
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#if HAVE_MIPSFPU
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static int sbr_lf_gen_mips(AACContext *ac, SpectralBandReplication *sbr,
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static int sbr_lf_gen_mips(AACContext *ac, SpectralBandReplication *sbr,
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float X_low[32][40][2], const float W[2][32][32][2],
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float X_low[32][40][2], const float W[2][32][32][2],
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int buf_idx)
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int buf_idx)
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@ -310,7 +311,6 @@ static int sbr_x_gen_mips(SpectralBandReplication *sbr, float X[2][38][64],
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return 0;
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return 0;
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}
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}
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#if HAVE_MIPSFPU
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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static void sbr_hf_assemble_mips(float Y1[38][64][2],
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static void sbr_hf_assemble_mips(float Y1[38][64][2],
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const float X_high[64][40][2],
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const float X_high[64][40][2],
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@ -611,9 +611,9 @@ static void sbr_hf_inverse_filter_mips(SBRDSPContext *dsp,
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void ff_aacsbr_func_ptr_init_mips(AACSBRContext *c)
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void ff_aacsbr_func_ptr_init_mips(AACSBRContext *c)
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{
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{
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#if HAVE_INLINE_ASM
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#if HAVE_INLINE_ASM
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#if HAVE_MIPSFPU
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c->sbr_lf_gen = sbr_lf_gen_mips;
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c->sbr_lf_gen = sbr_lf_gen_mips;
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c->sbr_x_gen = sbr_x_gen_mips;
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c->sbr_x_gen = sbr_x_gen_mips;
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#if HAVE_MIPSFPU
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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c->sbr_hf_inverse_filter = sbr_hf_inverse_filter_mips;
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c->sbr_hf_inverse_filter = sbr_hf_inverse_filter_mips;
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c->sbr_hf_assemble = sbr_hf_assemble_mips;
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c->sbr_hf_assemble = sbr_hf_assemble_mips;
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@ -59,6 +59,7 @@
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#include "libavutil/mips/asmdefs.h"
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#include "libavutil/mips/asmdefs.h"
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#if HAVE_INLINE_ASM
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#if HAVE_INLINE_ASM
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#if HAVE_MIPSFPU
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static void sbr_qmf_pre_shuffle_mips(float *z)
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static void sbr_qmf_pre_shuffle_mips(float *z)
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{
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{
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int Temp1, Temp2, Temp3, Temp4, Temp5, Temp6;
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int Temp1, Temp2, Temp3, Temp4, Temp5, Temp6;
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@ -165,7 +166,6 @@ static void sbr_qmf_post_shuffle_mips(float W[32][2], const float *z)
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);
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);
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}
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}
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#if HAVE_MIPSFPU
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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static void sbr_sum64x5_mips(float *z)
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static void sbr_sum64x5_mips(float *z)
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{
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{
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@ -890,9 +890,9 @@ static void sbr_hf_apply_noise_3_mips(float (*Y)[2], const float *s_m,
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void ff_sbrdsp_init_mips(SBRDSPContext *s)
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void ff_sbrdsp_init_mips(SBRDSPContext *s)
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{
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{
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#if HAVE_INLINE_ASM
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#if HAVE_INLINE_ASM
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#if HAVE_MIPSFPU
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s->qmf_pre_shuffle = sbr_qmf_pre_shuffle_mips;
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s->qmf_pre_shuffle = sbr_qmf_pre_shuffle_mips;
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s->qmf_post_shuffle = sbr_qmf_post_shuffle_mips;
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s->qmf_post_shuffle = sbr_qmf_post_shuffle_mips;
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#if HAVE_MIPSFPU
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
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s->sum64x5 = sbr_sum64x5_mips;
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s->sum64x5 = sbr_sum64x5_mips;
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s->sum_square = sbr_sum_square_mips;
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s->sum_square = sbr_sum_square_mips;
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