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lavc/aarch64: Add neon implementation for vsse_intra16
Provide optimized implementation for vsse_intra16 for arm64. Performance tests are shown below. - vsse_4_c: 155.2 - vsse_4_neon: 36.2 Benchmarks and tests are run with checkasm tool on AWS Graviton 3. Signed-off-by: Hubert Mazur <hum@semihalf.com> Signed-off-by: Martin Storsjö <martin@martin.st>
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Martin Storsjö
parent
ce03ea3e79
commit
908abe8032
@@ -47,6 +47,8 @@ int vsad_intra16_neon(MpegEncContext *c, const uint8_t *s, const uint8_t *dummy,
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ptrdiff_t stride, int h) ;
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ptrdiff_t stride, int h) ;
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int vsse16_neon(MpegEncContext *c, const uint8_t *s1, const uint8_t *s2,
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int vsse16_neon(MpegEncContext *c, const uint8_t *s1, const uint8_t *s2,
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ptrdiff_t stride, int h);
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ptrdiff_t stride, int h);
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int vsse_intra16_neon(MpegEncContext *c, const uint8_t *s, const uint8_t *dummy,
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ptrdiff_t stride, int h);
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av_cold void ff_me_cmp_init_aarch64(MECmpContext *c, AVCodecContext *avctx)
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av_cold void ff_me_cmp_init_aarch64(MECmpContext *c, AVCodecContext *avctx)
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{
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{
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@@ -69,5 +71,6 @@ av_cold void ff_me_cmp_init_aarch64(MECmpContext *c, AVCodecContext *avctx)
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c->vsad[4] = vsad_intra16_neon;
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c->vsad[4] = vsad_intra16_neon;
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c->vsse[0] = vsse16_neon;
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c->vsse[0] = vsse16_neon;
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c->vsse[4] = vsse_intra16_neon;
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}
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}
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}
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}
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@@ -784,3 +784,66 @@ function vsad_intra16_neon, export=1
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ret
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ret
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endfunc
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endfunc
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function vsse_intra16_neon, export=1
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// x0 unused
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// x1 uint8_t *pix1
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// x2 uint8_t *dummy
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// x3 ptrdiff_t stride
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// w4 int h
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ld1 {v0.16b}, [x1], x3
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movi v16.4s, #0
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movi v17.4s, #0
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sub w4, w4, #1 // we need to make h-1 iterations
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cmp w4, #3
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b.lt 2f
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1:
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// v = abs( pix1[0] - pix1[0 + stride] )
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// score = sum( v * v )
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ld1 {v1.16b}, [x1], x3
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ld1 {v2.16b}, [x1], x3
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uabd v30.16b, v0.16b, v1.16b
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ld1 {v3.16b}, [x1], x3
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umull v29.8h, v30.8b, v30.8b
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umull2 v28.8h, v30.16b, v30.16b
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uabd v27.16b, v1.16b, v2.16b
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uadalp v16.4s, v29.8h
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umull v26.8h, v27.8b, v27.8b
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umull2 v27.8h, v27.16b, v27.16b
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uadalp v17.4s, v28.8h
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uabd v25.16b, v2.16b, v3.16b
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uadalp v16.4s, v26.8h
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umull v24.8h, v25.8b, v25.8b
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umull2 v25.8h, v25.16b, v25.16b
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uadalp v17.4s, v27.8h
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sub w4, w4, #3
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uadalp v16.4s, v24.8h
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cmp w4, #3
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uadalp v17.4s, v25.8h
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mov v0.16b, v3.16b
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b.ge 1b
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cbz w4, 3f
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// iterate by one
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2:
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ld1 {v1.16b}, [x1], x3
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subs w4, w4, #1
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uabd v30.16b, v0.16b, v1.16b
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mov v0.16b, v1.16b
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umull v29.8h, v30.8b, v30.8b
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umull2 v30.8h, v30.16b, v30.16b
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uadalp v16.4s, v29.8h
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uadalp v17.4s, v30.8h
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cbnz w4, 2b
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3:
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add v16.4s, v16.4s, v17.4S
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uaddlv d17, v16.4s
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fmov w0, s17
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ret
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endfunc
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