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Drop unused args from vector_fmul_add_add, simpify code, and rename
The src3 and step arguments to vector_fmul_add_add() are always zero and one, respectively. This removes these arguments from the function, simplifies the code accordingly, and renames the function to better match the new operation. Originally committed as revision 20061 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Måns Rullgård
parent
7f5c14210b
commit
952e872198
@ -4068,10 +4068,10 @@ static void vector_fmul_reverse_c(float *dst, const float *src0, const float *sr
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dst[i] = src0[i] * src1[-i];
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}
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void ff_vector_fmul_add_add_c(float *dst, const float *src0, const float *src1, const float *src2, int src3, int len, int step){
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static void vector_fmul_add_c(float *dst, const float *src0, const float *src1, const float *src2, int len){
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int i;
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for(i=0; i<len; i++)
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dst[i*step] = src0[i] * src1[i] + src2[i] + src3;
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dst[i] = src0[i] * src1[i] + src2[i];
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}
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void ff_vector_fmul_window_c(float *dst, const float *src0, const float *src1, const float *win, float add_bias, int len){
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@ -4787,7 +4787,7 @@ void dsputil_init(DSPContext* c, AVCodecContext *avctx)
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#endif
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c->vector_fmul = vector_fmul_c;
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c->vector_fmul_reverse = vector_fmul_reverse_c;
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c->vector_fmul_add_add = ff_vector_fmul_add_add_c;
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c->vector_fmul_add = vector_fmul_add_c;
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c->vector_fmul_window = ff_vector_fmul_window_c;
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c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_c;
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c->vector_clipf = vector_clipf_c;
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@ -66,8 +66,6 @@ void ff_h264_idct_add16intra_c(uint8_t *dst, const int *blockoffset, DCTELEM *bl
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void ff_h264_idct8_add4_c(uint8_t *dst, const int *blockoffset, DCTELEM *block, int stride, const uint8_t nnzc[6*8]);
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void ff_h264_idct_add8_c(uint8_t **dest, const int *blockoffset, DCTELEM *block, int stride, const uint8_t nnzc[6*8]);
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void ff_vector_fmul_add_add_c(float *dst, const float *src0, const float *src1,
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const float *src2, int src3, int blocksize, int step);
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void ff_vector_fmul_window_c(float *dst, const float *src0, const float *src1,
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const float *win, float add_bias, int len);
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void ff_float_to_int16_c(int16_t *dst, const float *src, long len);
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@ -391,7 +389,7 @@ typedef struct DSPContext {
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void (*vector_fmul)(float *dst, const float *src, int len);
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void (*vector_fmul_reverse)(float *dst, const float *src0, const float *src1, int len);
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/* assume len is a multiple of 8, and src arrays are 16-byte aligned */
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void (*vector_fmul_add_add)(float *dst, const float *src0, const float *src1, const float *src2, int src3, int len, int step);
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void (*vector_fmul_add)(float *dst, const float *src0, const float *src1, const float *src2, int len);
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/* assume len is a multiple of 4, and arrays are 16-byte aligned */
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void (*vector_fmul_window)(float *dst, const float *src0, const float *src1, const float *win, float add_bias, int len);
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/* assume len is a multiple of 8, and arrays are 16-byte aligned */
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@ -66,71 +66,15 @@ static void vector_fmul_reverse_altivec(float *dst, const float *src0,
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}
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}
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static void vector_fmul_add_add_altivec(float *dst, const float *src0,
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const float *src1, const float *src2,
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int src3, int len, int step)
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static void vector_fmul_add_altivec(float *dst, const float *src0,
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const float *src1, const float *src2,
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int len)
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{
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int i;
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vector float d, s0, s1, s2, t0, t1, edges;
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vector unsigned char align = vec_lvsr(0,dst),
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mask = vec_lvsl(0, dst);
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#if 0 //FIXME: there is still something wrong
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if (step == 2) {
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int y;
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vector float d0, d1, s3, t2;
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vector unsigned int sel =
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vec_mergeh(vec_splat_u32(-1), vec_splat_u32(0));
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t1 = vec_ld(16, dst);
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for (i=0,y=0; i<len-3; i+=4,y+=8) {
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s0 = vec_ld(0,src0+i);
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s1 = vec_ld(0,src1+i);
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s2 = vec_ld(0,src2+i);
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// t0 = vec_ld(0, dst+y); //[x x x|a]
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// t1 = vec_ld(16, dst+y); //[b c d|e]
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t2 = vec_ld(31, dst+y); //[f g h|x]
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d = vec_madd(s0,s1,s2); // [A B C D]
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// [A A B B]
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// [C C D D]
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d0 = vec_perm(t0, t1, mask); // [a b c d]
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d0 = vec_sel(vec_mergeh(d, d), d0, sel); // [A b B d]
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edges = vec_perm(t1, t0, mask);
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t0 = vec_perm(edges, d0, align); // [x x x|A]
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t1 = vec_perm(d0, edges, align); // [b B d|e]
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vec_stl(t0, 0, dst+y);
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d1 = vec_perm(t1, t2, mask); // [e f g h]
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d1 = vec_sel(vec_mergel(d, d), d1, sel); // [C f D h]
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edges = vec_perm(t2, t1, mask);
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t1 = vec_perm(edges, d1, align); // [b B d|C]
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t2 = vec_perm(d1, edges, align); // [f D h|x]
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vec_stl(t1, 16, dst+y);
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t0 = t1;
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vec_stl(t2, 31, dst+y);
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t1 = t2;
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}
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} else
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#endif
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if (step == 1 && src3 == 0)
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for (i=0; i<len-3; i+=4) {
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t0 = vec_ld(0, dst+i);
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t1 = vec_ld(15, dst+i);
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@ -144,8 +88,6 @@ static void vector_fmul_add_add_altivec(float *dst, const float *src0,
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vec_st(t1, 15, dst+i);
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vec_st(t0, 0, dst+i);
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}
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else
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ff_vector_fmul_add_add_c(dst, src0, src1, src2, src3, len, step);
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}
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static void vector_fmul_window_altivec(float *dst, const float *src0, const float *src1, const float *win, float add_bias, int len)
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@ -299,7 +241,7 @@ void float_init_altivec(DSPContext* c, AVCodecContext *avctx)
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{
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c->vector_fmul = vector_fmul_altivec;
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c->vector_fmul_reverse = vector_fmul_reverse_altivec;
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c->vector_fmul_add_add = vector_fmul_add_add_altivec;
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c->vector_fmul_add = vector_fmul_add_altivec;
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c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_altivec;
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if(!(avctx->flags & CODEC_FLAG_BITEXACT)) {
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c->vector_fmul_window = vector_fmul_window_altivec;
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@ -301,16 +301,16 @@ static void wma_window(WMACodecContext *s, float *out)
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block_len = s->block_len;
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bsize = s->frame_len_bits - s->block_len_bits;
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s->dsp.vector_fmul_add_add(out, in, s->windows[bsize],
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out, 0, block_len, 1);
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s->dsp.vector_fmul_add(out, in, s->windows[bsize],
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out, block_len);
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} else {
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block_len = 1 << s->prev_block_len_bits;
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n = (s->block_len - block_len) / 2;
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bsize = s->frame_len_bits - s->prev_block_len_bits;
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s->dsp.vector_fmul_add_add(out+n, in+n, s->windows[bsize],
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out+n, 0, block_len, 1);
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s->dsp.vector_fmul_add(out+n, in+n, s->windows[bsize],
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out+n, block_len);
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memcpy(out+n+block_len, in+n+block_len, n*sizeof(float));
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}
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@ -2125,34 +2125,9 @@ static void vector_fmul_reverse_sse(float *dst, const float *src0, const float *
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);
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}
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static void vector_fmul_add_add_3dnow(float *dst, const float *src0, const float *src1,
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const float *src2, int src3, int len, int step){
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static void vector_fmul_add_3dnow(float *dst, const float *src0, const float *src1,
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const float *src2, int len){
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x86_reg i = (len-4)*4;
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if(step == 2 && src3 == 0){
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dst += (len-4)*2;
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__asm__ volatile(
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"1: \n\t"
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"movq (%2,%0), %%mm0 \n\t"
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"movq 8(%2,%0), %%mm1 \n\t"
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"pfmul (%3,%0), %%mm0 \n\t"
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"pfmul 8(%3,%0), %%mm1 \n\t"
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"pfadd (%4,%0), %%mm0 \n\t"
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"pfadd 8(%4,%0), %%mm1 \n\t"
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"movd %%mm0, (%1) \n\t"
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"movd %%mm1, 16(%1) \n\t"
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"psrlq $32, %%mm0 \n\t"
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"psrlq $32, %%mm1 \n\t"
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"movd %%mm0, 8(%1) \n\t"
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"movd %%mm1, 24(%1) \n\t"
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"sub $32, %1 \n\t"
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"sub $16, %0 \n\t"
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"jge 1b \n\t"
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:"+r"(i), "+r"(dst)
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:"r"(src0), "r"(src1), "r"(src2)
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:"memory"
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);
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}
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else if(step == 1 && src3 == 0){
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__asm__ volatile(
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"1: \n\t"
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"movq (%2,%0), %%mm0 \n\t"
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@ -2169,47 +2144,11 @@ static void vector_fmul_add_add_3dnow(float *dst, const float *src0, const float
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:"r"(dst), "r"(src0), "r"(src1), "r"(src2)
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:"memory"
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);
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}
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else
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ff_vector_fmul_add_add_c(dst, src0, src1, src2, src3, len, step);
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__asm__ volatile("femms");
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}
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static void vector_fmul_add_add_sse(float *dst, const float *src0, const float *src1,
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const float *src2, int src3, int len, int step){
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static void vector_fmul_add_sse(float *dst, const float *src0, const float *src1,
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const float *src2, int len){
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x86_reg i = (len-8)*4;
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if(step == 2 && src3 == 0){
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dst += (len-8)*2;
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__asm__ volatile(
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"1: \n\t"
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"movaps (%2,%0), %%xmm0 \n\t"
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"movaps 16(%2,%0), %%xmm1 \n\t"
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"mulps (%3,%0), %%xmm0 \n\t"
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"mulps 16(%3,%0), %%xmm1 \n\t"
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"addps (%4,%0), %%xmm0 \n\t"
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"addps 16(%4,%0), %%xmm1 \n\t"
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"movss %%xmm0, (%1) \n\t"
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"movss %%xmm1, 32(%1) \n\t"
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"movhlps %%xmm0, %%xmm2 \n\t"
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"movhlps %%xmm1, %%xmm3 \n\t"
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"movss %%xmm2, 16(%1) \n\t"
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"movss %%xmm3, 48(%1) \n\t"
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"shufps $0xb1, %%xmm0, %%xmm0 \n\t"
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"shufps $0xb1, %%xmm1, %%xmm1 \n\t"
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"movss %%xmm0, 8(%1) \n\t"
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"movss %%xmm1, 40(%1) \n\t"
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"movhlps %%xmm0, %%xmm2 \n\t"
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"movhlps %%xmm1, %%xmm3 \n\t"
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"movss %%xmm2, 24(%1) \n\t"
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"movss %%xmm3, 56(%1) \n\t"
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"sub $64, %1 \n\t"
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"sub $32, %0 \n\t"
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"jge 1b \n\t"
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:"+r"(i), "+r"(dst)
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:"r"(src0), "r"(src1), "r"(src2)
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:"memory"
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);
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}
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else if(step == 1 && src3 == 0){
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__asm__ volatile(
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"1: \n\t"
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"movaps (%2,%0), %%xmm0 \n\t"
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@ -2226,9 +2165,6 @@ static void vector_fmul_add_add_sse(float *dst, const float *src0, const float *
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:"r"(dst), "r"(src0), "r"(src1), "r"(src2)
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:"memory"
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);
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}
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else
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ff_vector_fmul_add_add_c(dst, src0, src1, src2, src3, len, step);
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}
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static void vector_fmul_window_3dnow2(float *dst, const float *src0, const float *src1,
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@ -3077,7 +3013,7 @@ void dsputil_init_mmx(DSPContext* c, AVCodecContext *avctx)
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c->ac3_downmix = ac3_downmix_sse;
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c->vector_fmul = vector_fmul_sse;
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c->vector_fmul_reverse = vector_fmul_reverse_sse;
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c->vector_fmul_add_add = vector_fmul_add_add_sse;
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c->vector_fmul_add = vector_fmul_add_sse;
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c->vector_fmul_window = vector_fmul_window_sse;
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c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_sse;
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c->vector_clipf = vector_clipf_sse;
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@ -3085,7 +3021,7 @@ void dsputil_init_mmx(DSPContext* c, AVCodecContext *avctx)
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c->float_to_int16_interleave = float_to_int16_interleave_sse;
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}
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if(mm_flags & FF_MM_3DNOW)
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c->vector_fmul_add_add = vector_fmul_add_add_3dnow; // faster than sse
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c->vector_fmul_add = vector_fmul_add_3dnow; // faster than sse
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if(mm_flags & FF_MM_SSE2){
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c->int32_to_float_fmul_scalar = int32_to_float_fmul_scalar_sse2;
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c->float_to_int16 = float_to_int16_sse2;
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