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Merge commit '89d9869d2491d4209d707a8e7f29c58227ae5a4e'
* commit '89d9869d2491d4209d707a8e7f29c58227ae5a4e': hevc: Add NEON 16x16 IDCT Merged-by: James Almer <jamrial@gmail.com>
This commit is contained in:
James Almer
commit
9840ca70e7
@ -429,7 +429,204 @@ function ff_hevc_idct_8x8_\bitdepth\()_neon, export=1
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endfunc
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endfunc
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.endm
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.endm
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.macro butterfly e, o, tmp_p, tmp_m
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vadd.s32 \tmp_p, \e, \o
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vsub.s32 \tmp_m, \e, \o
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.endm
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.macro tr16_8x4 in0, in1, in2, in3, in4, in5, in6, in7
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tr_4x4_8 \in0, \in2, \in4, \in6, q8, q9, q10, q11, q12, q13, q14, q15
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vmull.s16 q12, \in1, \in0[0]
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vmull.s16 q13, \in1, \in0[1]
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vmull.s16 q14, \in1, \in0[2]
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vmull.s16 q15, \in1, \in0[3]
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sum_sub q12, \in3, \in0[1], +
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sum_sub q13, \in3, \in0[3], -
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sum_sub q14, \in3, \in0[0], -
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sum_sub q15, \in3, \in0[2], -
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sum_sub q12, \in5, \in0[2], +
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sum_sub q13, \in5, \in0[0], -
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sum_sub q14, \in5, \in0[3], +
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sum_sub q15, \in5, \in0[1], +
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sum_sub q12, \in7, \in0[3], +
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sum_sub q13, \in7, \in0[2], -
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sum_sub q14, \in7, \in0[1], +
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sum_sub q15, \in7, \in0[0], -
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butterfly q8, q12, q0, q7
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butterfly q9, q13, q1, q6
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butterfly q10, q14, q2, q5
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butterfly q11, q15, q3, q4
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add r4, sp, #512
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vst1.s16 {q0-q1}, [r4, :128]!
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vst1.s16 {q2-q3}, [r4, :128]!
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vst1.s16 {q4-q5}, [r4, :128]!
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vst1.s16 {q6-q7}, [r4, :128]
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.endm
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.macro load16 in0, in1, in2, in3, in4, in5, in6, in7
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vld1.s16 {\in0}, [r1, :64], r2
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vld1.s16 {\in1}, [r3, :64], r2
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vld1.s16 {\in2}, [r1, :64], r2
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vld1.s16 {\in3}, [r3, :64], r2
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vld1.s16 {\in4}, [r1, :64], r2
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vld1.s16 {\in5}, [r3, :64], r2
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vld1.s16 {\in6}, [r1, :64], r2
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vld1.s16 {\in7}, [r3, :64], r2
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.endm
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.macro add_member in, t0, t1, t2, t3, t4, t5, t6, t7, op0, op1, op2, op3, op4, op5, op6, op7
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sum_sub q5, \in, \t0, \op0
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sum_sub q6, \in, \t1, \op1
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sum_sub q7, \in, \t2, \op2
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sum_sub q8, \in, \t3, \op3
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sum_sub q9, \in, \t4, \op4
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sum_sub q10, \in, \t5, \op5
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sum_sub q11, \in, \t6, \op6
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sum_sub q12, \in, \t7, \op7
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.endm
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.macro butterfly16 in0, in1, in2, in3, in4, in5, in6, in7
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vadd.s32 q4, \in0, \in1
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vsub.s32 \in0, \in0, \in1
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vadd.s32 \in1, \in2, \in3
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vsub.s32 \in2, \in2, \in3
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vadd.s32 \in3, \in4, \in5
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vsub.s32 \in4, \in4, \in5
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vadd.s32 \in5, \in6, \in7
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vsub.s32 \in6, \in6, \in7
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.endm
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.macro store16 in0, in1, in2, in3, in4, in5, in6, in7
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vst1.s16 \in0, [r1, :64], r2
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vst1.s16 \in1, [r3, :64], r4
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vst1.s16 \in2, [r1, :64], r2
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vst1.s16 \in3, [r3, :64], r4
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vst1.s16 \in4, [r1, :64], r2
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vst1.s16 \in5, [r3, :64], r4
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vst1.s16 \in6, [r1, :64], r2
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vst1.s16 \in7, [r3, :64], r4
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.endm
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.macro scale out0, out1, out2, out3, out4, out5, out6, out7, in0, in1, in2, in3, in4, in5, in6, in7, shift
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vqrshrn.s32 \out0, \in0, \shift
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vqrshrn.s32 \out1, \in1, \shift
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vqrshrn.s32 \out2, \in2, \shift
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vqrshrn.s32 \out3, \in3, \shift
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vqrshrn.s32 \out4, \in4, \shift
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vqrshrn.s32 \out5, \in5, \shift
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vqrshrn.s32 \out6, \in6, \shift
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vqrshrn.s32 \out7, \in7, \shift
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.endm
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.macro tr_16x4 name, shift
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function func_tr_16x4_\name
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mov r1, r5
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add r3, r5, #64
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mov r2, #128
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load16 d0, d1, d2, d3, d4, d5, d6, d7
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movrel r1, trans
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tr16_8x4 d0, d1, d2, d3, d4, d5, d6, d7
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add r1, r5, #32
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add r3, r5, #(64 + 32)
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mov r2, #128
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load16 d8, d9, d2, d3, d4, d5, d6, d7
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movrel r1, trans + 16
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vld1.s16 {q0}, [r1, :128]
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vmull.s16 q5, d8, d0[0]
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vmull.s16 q6, d8, d0[1]
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vmull.s16 q7, d8, d0[2]
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vmull.s16 q8, d8, d0[3]
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vmull.s16 q9, d8, d1[0]
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vmull.s16 q10, d8, d1[1]
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vmull.s16 q11, d8, d1[2]
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vmull.s16 q12, d8, d1[3]
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add_member d9, d0[1], d1[0], d1[3], d1[1], d0[2], d0[0], d0[3], d1[2], +, +, +, -, -, -, -, -
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add_member d2, d0[2], d1[3], d0[3], d0[1], d1[2], d1[0], d0[0], d1[1], +, +, -, -, -, +, +, +
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add_member d3, d0[3], d1[1], d0[1], d1[3], d0[0], d1[2], d0[2], d1[0], +, -, -, +, +, +, -, -
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add_member d4, d1[0], d0[2], d1[2], d0[0], d1[3], d0[1], d1[1], d0[3], +, -, -, +, -, -, +, +
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add_member d5, d1[1], d0[0], d1[0], d1[2], d0[1], d0[3], d1[3], d0[2], +, -, +, +, -, +, +, -
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add_member d6, d1[2], d0[3], d0[0], d0[2], d1[1], d1[3], d1[0], d0[1], +, -, +, -, +, +, -, +
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add_member d7, d1[3], d1[2], d1[1], d1[0], d0[3], d0[2], d0[1], d0[0], +, -, +, -, +, -, +, -
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add r4, sp, #512
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vld1.s16 {q0-q1}, [r4, :128]!
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vld1.s16 {q2-q3}, [r4, :128]!
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butterfly16 q0, q5, q1, q6, q2, q7, q3, q8
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scale d26, d27, d28, d29, d30, d31, d16, d17, q4, q0, q5, q1, q6, q2, q7, q3, \shift
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transpose8_4x4 d26, d28, d30, d16
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transpose8_4x4 d17, d31, d29, d27
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mov r1, r6
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add r3, r6, #(24 +3*32)
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mov r2, #32
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mov r4, #-32
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store16 d26, d27, d28, d29, d30, d31, d16, d17
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add r4, sp, #576
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vld1.s16 {q0-q1}, [r4, :128]!
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vld1.s16 {q2-q3}, [r4, :128]
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butterfly16 q0, q9, q1, q10, q2, q11, q3, q12
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scale d26, d27, d28, d29, d30, d31, d8, d9, q4, q0, q9, q1, q10, q2, q11, q3, \shift
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transpose8_4x4 d26, d28, d30, d8
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transpose8_4x4 d9, d31, d29, d27
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add r1, r6, #8
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add r3, r6, #(16 + 3 * 32)
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mov r2, #32
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mov r4, #-32
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store16 d26, d27, d28, d29, d30, d31, d8, d9
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bx lr
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endfunc
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.endm
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.macro idct_16x16 bitdepth
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function ff_hevc_idct_16x16_\bitdepth\()_neon, export=1
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@r0 - coeffs
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push {r4-r7, lr}
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vpush {q4-q7}
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@ Align the stack, allocate a temp buffer
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T mov r7, sp
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T and r7, r7, #15
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A and r7, sp, #15
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add r7, r7, #640
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sub sp, sp, r7
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.irp i, 0, 1, 2, 3
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add r5, r0, #(8 * \i)
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add r6, sp, #(8 * \i * 16)
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bl func_tr_16x4_firstpass
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.endr
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.irp i, 0, 1, 2, 3
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add r5, sp, #(8 * \i)
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add r6, r0, #(8 * \i * 16)
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bl func_tr_16x4_secondpass_\bitdepth
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.endr
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add sp, sp, r7
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vpop {q4-q7}
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pop {r4-r7, pc}
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endfunc
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.endm
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tr_16x4 firstpass, 7
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tr_16x4 secondpass_8, 20 - 8
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tr_16x4 secondpass_10, 20 - 10
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.ltorg
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idct_4x4 8
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idct_4x4 8
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idct_4x4 10
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idct_4x4 10
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idct_8x8 8
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idct_8x8 8
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idct_8x8 10
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idct_8x8 10
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idct_16x16 8
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idct_16x16 10
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@ -29,8 +29,10 @@ void ff_hevc_v_loop_filter_chroma_neon(uint8_t *_pix, ptrdiff_t _stride, int *_t
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void ff_hevc_h_loop_filter_chroma_neon(uint8_t *_pix, ptrdiff_t _stride, int *_tc, uint8_t *_no_p, uint8_t *_no_q);
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void ff_hevc_h_loop_filter_chroma_neon(uint8_t *_pix, ptrdiff_t _stride, int *_tc, uint8_t *_no_p, uint8_t *_no_q);
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void ff_hevc_idct_4x4_8_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_4x4_8_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_8x8_8_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_8x8_8_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_16x16_8_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_4x4_10_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_4x4_10_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_8x8_10_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_8x8_10_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_16x16_10_neon(int16_t *coeffs, int col_limit);
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void ff_hevc_idct_4x4_dc_neon_8(int16_t *coeffs);
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void ff_hevc_idct_4x4_dc_neon_8(int16_t *coeffs);
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void ff_hevc_idct_8x8_dc_neon_8(int16_t *coeffs);
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void ff_hevc_idct_8x8_dc_neon_8(int16_t *coeffs);
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void ff_hevc_idct_16x16_dc_neon_8(int16_t *coeffs);
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void ff_hevc_idct_16x16_dc_neon_8(int16_t *coeffs);
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@ -154,6 +156,7 @@ av_cold void ff_hevc_dsp_init_neon(HEVCDSPContext *c, const int bit_depth)
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c->hevc_h_loop_filter_chroma = ff_hevc_h_loop_filter_chroma_neon;
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c->hevc_h_loop_filter_chroma = ff_hevc_h_loop_filter_chroma_neon;
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c->idct[0] = ff_hevc_idct_4x4_8_neon;
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c->idct[0] = ff_hevc_idct_4x4_8_neon;
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c->idct[1] = ff_hevc_idct_8x8_8_neon;
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c->idct[1] = ff_hevc_idct_8x8_8_neon;
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c->idct[2] = ff_hevc_idct_16x16_8_neon;
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c->idct_dc[0] = ff_hevc_idct_4x4_dc_neon_8;
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c->idct_dc[0] = ff_hevc_idct_4x4_dc_neon_8;
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c->idct_dc[1] = ff_hevc_idct_8x8_dc_neon_8;
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c->idct_dc[1] = ff_hevc_idct_8x8_dc_neon_8;
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c->idct_dc[2] = ff_hevc_idct_16x16_dc_neon_8;
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c->idct_dc[2] = ff_hevc_idct_16x16_dc_neon_8;
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@ -227,5 +230,6 @@ av_cold void ff_hevc_dsp_init_neon(HEVCDSPContext *c, const int bit_depth)
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if (bit_depth == 10) {
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if (bit_depth == 10) {
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c->idct[0] = ff_hevc_idct_4x4_10_neon;
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c->idct[0] = ff_hevc_idct_4x4_10_neon;
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c->idct[1] = ff_hevc_idct_8x8_10_neon;
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c->idct[1] = ff_hevc_idct_8x8_10_neon;
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c->idct[2] = ff_hevc_idct_16x16_10_neon;
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}
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}
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}
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}
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