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lavc/vp8dsp: restrict RVI optimisations
They are actually awfully slow if the CPU does not support misaligned accesses natively, so only use them if misaligned accesses are fast.
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@ -45,7 +45,7 @@ av_cold void ff_vp78dsp_init_riscv(VP8DSPContext *c)
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{
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#if HAVE_RV
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int flags = av_get_cpu_flags();
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if (flags & AV_CPU_FLAG_RVI) {
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if (flags & AV_CPU_FLAG_RV_MISALIGNED) {
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#if __riscv_xlen >= 64
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c->put_vp8_epel_pixels_tab[0][0][0] = ff_put_vp8_pixels16_rvi;
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c->put_vp8_epel_pixels_tab[1][0][0] = ff_put_vp8_pixels8_rvi;
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