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fft: port FFT/IMDCT 3dnow functions to yasm, and disable on x86-64.
64-bit CPUs always have SSE available, thus there is no need to compile in the 3dnow functions. This results in smaller binaries.
This commit is contained in:
Ronald S. Bultje
Michael Niedermayer
parent
19d40c7912
commit
9f14cd91b5
@ -42,8 +42,6 @@ YASM-OBJS-$(CONFIG_AC3DSP) += x86/ac3dsp.o
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YASM-OBJS-$(CONFIG_DCT) += x86/dct32_sse.o
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YASM-OBJS-$(CONFIG_DIRAC_DECODER) += x86/diracdsp_mmx.o x86/diracdsp_yasm.o
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YASM-OBJS-$(CONFIG_ENCODERS) += x86/dsputilenc_yasm.o
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YASM-OBJS-FFT-$(HAVE_AMD3DNOW) += x86/fft_3dn.o
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YASM-OBJS-FFT-$(HAVE_AMD3DNOWEXT) += x86/fft_3dn2.o
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YASM-OBJS-$(CONFIG_FFT) += x86/fft_mmx.o \
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$(YASM-OBJS-FFT-yes)
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@ -1,23 +0,0 @@
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/*
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* FFT/MDCT transform with 3DNow! optimizations
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* Copyright (c) 2008 Loren Merritt
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#define EMULATE_3DNOWEXT
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#include "fft_3dn2.c"
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@ -1,173 +0,0 @@
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/*
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* FFT/MDCT transform with Extended 3DNow! optimizations
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* Copyright (c) 2006-2008 Zuxy MENG Jie, Loren Merritt
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/x86_cpu.h"
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#include "libavcodec/dsputil.h"
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#include "fft.h"
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DECLARE_ALIGNED(8, static const unsigned int, m1m1)[2] = { 1U<<31, 1U<<31 };
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#ifdef EMULATE_3DNOWEXT
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#define PSWAPD(s,d)\
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"movq "#s","#d"\n"\
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"psrlq $32,"#d"\n"\
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"punpckldq "#s","#d"\n"
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#define ff_fft_calc_3dnow2 ff_fft_calc_3dnow
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#define ff_fft_dispatch_3dnow2 ff_fft_dispatch_3dnow
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#define ff_fft_dispatch_interleave_3dnow2 ff_fft_dispatch_interleave_3dnow
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#define ff_imdct_calc_3dnow2 ff_imdct_calc_3dnow
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#define ff_imdct_half_3dnow2 ff_imdct_half_3dnow
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#else
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#define PSWAPD(s,d) "pswapd "#s","#d"\n"
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#endif
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void ff_fft_dispatch_3dnow2(FFTComplex *z, int nbits);
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void ff_fft_dispatch_interleave_3dnow2(FFTComplex *z, int nbits);
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void ff_fft_calc_3dnow2(FFTContext *s, FFTComplex *z)
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{
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int n = 1<<s->nbits;
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int i;
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ff_fft_dispatch_interleave_3dnow2(z, s->nbits);
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__asm__ volatile("femms");
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if(n <= 8)
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for(i=0; i<n; i+=2)
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FFSWAP(FFTSample, z[i].im, z[i+1].re);
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}
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void ff_imdct_half_3dnow2(FFTContext *s, FFTSample *output, const FFTSample *input)
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{
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x86_reg j, k;
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long n = s->mdct_size;
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long n2 = n >> 1;
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long n4 = n >> 2;
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long n8 = n >> 3;
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const uint16_t *revtab = s->revtab;
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const FFTSample *tcos = s->tcos;
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const FFTSample *tsin = s->tsin;
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const FFTSample *in1, *in2;
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FFTComplex *z = (FFTComplex *)output;
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/* pre rotation */
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in1 = input;
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in2 = input + n2 - 1;
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#ifdef EMULATE_3DNOWEXT
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__asm__ volatile("movd %0, %%mm7" ::"r"(1U<<31));
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#endif
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for(k = 0; k < n4; k++) {
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// FIXME a single block is faster, but gcc 2.95 and 3.4.x on 32bit can't compile it
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__asm__ volatile(
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"movd %0, %%mm0 \n"
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"movd %2, %%mm1 \n"
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"punpckldq %1, %%mm0 \n"
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"punpckldq %3, %%mm1 \n"
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"movq %%mm0, %%mm2 \n"
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PSWAPD( %%mm1, %%mm3 )
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"pfmul %%mm1, %%mm0 \n"
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"pfmul %%mm3, %%mm2 \n"
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#ifdef EMULATE_3DNOWEXT
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"movq %%mm0, %%mm1 \n"
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"punpckhdq %%mm2, %%mm0 \n"
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"punpckldq %%mm2, %%mm1 \n"
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"pxor %%mm7, %%mm0 \n"
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"pfadd %%mm1, %%mm0 \n"
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#else
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"pfpnacc %%mm2, %%mm0 \n"
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#endif
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::"m"(in2[-2*k]), "m"(in1[2*k]),
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"m"(tcos[k]), "m"(tsin[k])
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);
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__asm__ volatile(
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"movq %%mm0, %0 \n\t"
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:"=m"(z[revtab[k]])
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);
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}
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ff_fft_dispatch_3dnow2(z, s->nbits);
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#define CMUL(j,mm0,mm1)\
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"movq (%2,"#j",2), %%mm6 \n"\
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"movq 8(%2,"#j",2), "#mm0"\n"\
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"movq %%mm6, "#mm1"\n"\
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"movq "#mm0",%%mm7 \n"\
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"pfmul (%3,"#j"), %%mm6 \n"\
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"pfmul (%4,"#j"), "#mm0"\n"\
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"pfmul (%4,"#j"), "#mm1"\n"\
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"pfmul (%3,"#j"), %%mm7 \n"\
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"pfsub %%mm6, "#mm0"\n"\
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"pfadd %%mm7, "#mm1"\n"
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/* post rotation */
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j = -n2;
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k = n2-8;
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__asm__ volatile(
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"1: \n"
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CMUL(%0, %%mm0, %%mm1)
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CMUL(%1, %%mm2, %%mm3)
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"movd %%mm0, (%2,%0,2) \n"
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"movd %%mm1,12(%2,%1,2) \n"
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"movd %%mm2, (%2,%1,2) \n"
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"movd %%mm3,12(%2,%0,2) \n"
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"psrlq $32, %%mm0 \n"
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"psrlq $32, %%mm1 \n"
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"psrlq $32, %%mm2 \n"
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"psrlq $32, %%mm3 \n"
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"movd %%mm0, 8(%2,%0,2) \n"
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"movd %%mm1, 4(%2,%1,2) \n"
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"movd %%mm2, 8(%2,%1,2) \n"
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"movd %%mm3, 4(%2,%0,2) \n"
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"sub $8, %1 \n"
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"add $8, %0 \n"
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"jl 1b \n"
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:"+r"(j), "+r"(k)
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:"r"(z+n8), "r"(tcos+n8), "r"(tsin+n8)
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:"memory"
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);
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__asm__ volatile("femms");
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}
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void ff_imdct_calc_3dnow2(FFTContext *s, FFTSample *output, const FFTSample *input)
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{
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x86_reg j, k;
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long n = s->mdct_size;
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long n4 = n >> 2;
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ff_imdct_half_3dnow2(s, output+n4, input);
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j = -n;
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k = n-8;
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__asm__ volatile(
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"movq %4, %%mm7 \n"
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"1: \n"
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PSWAPD((%2,%1), %%mm0)
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PSWAPD((%3,%0), %%mm1)
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"pxor %%mm7, %%mm0 \n"
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"movq %%mm1, (%3,%1) \n"
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"movq %%mm0, (%2,%0) \n"
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"sub $8, %1 \n"
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"add $8, %0 \n"
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"jl 1b \n"
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:"+r"(j), "+r"(k)
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:"r"(output+n4), "r"(output+n4*3),
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"m"(*m1m1)
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);
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__asm__ volatile("femms");
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}
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@ -29,6 +29,7 @@
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; i.e. {4x real, 4x imaginary, 4x real, ...} (or 2x respectively)
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%include "libavutil/x86/x86inc.asm"
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%include "libavutil/x86/x86util.asm"
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%if ARCH_X86_64
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%define pointer resq
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@ -105,7 +106,7 @@ SECTION_TEXT
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pfadd %5, %4 ; {t6,t5}
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pxor %3, [ps_m1p1] ; {t8,t7}
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mova %6, %1
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pswapd %3, %3
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PSWAPD %3, %3
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pfadd %1, %5 ; {r0,i0}
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pfsub %6, %5 ; {r2,i2}
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mova %4, %2
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@ -397,7 +398,6 @@ fft32_interleave_avx:
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%endif
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INIT_XMM sse
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%define movdqa movaps
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align 16
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fft4_avx:
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@ -470,8 +470,8 @@ fft8 %+ SUFFIX:
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mova Z(2), m2
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T2_3DN m4, m5, Z(4), Z(5)
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T2_3DN m6, m7, Z2(6), Z2(7)
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pswapd m0, m5
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pswapd m2, m7
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PSWAPD m0, m5
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PSWAPD m2, m7
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pxor m0, [ps_m1p1]
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pxor m2, [ps_m1p1]
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pfsub m5, m0
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@ -499,11 +499,11 @@ fft8 %+ SUFFIX:
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ret
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%endmacro
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INIT_MMX 3dnow2
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FFT48_3DN
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%macro pswapd 2
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%ifidn %1, %2
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%if ARCH_X86_32
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%macro PSWAPD 2
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%if cpuflag(3dnow2)
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pswapd %1, %2
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%elifidn %1, %2
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movd [r0+12], %1
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punpckhdq %1, [r0+8]
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%else
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@ -513,9 +513,12 @@ FFT48_3DN
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%endif
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%endmacro
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INIT_MMX 3dnow
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INIT_MMX 3dnow2
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FFT48_3DN
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INIT_MMX 3dnow
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FFT48_3DN
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%endif
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%define Z(x) [zcq + o1q*(x&6) + mmsize*(x&1)]
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%define Z2(x) [zcq + o3q + mmsize*(x&1)]
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@ -589,6 +592,7 @@ INIT_XMM sse
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DECL_PASS pass_sse, PASS_BIG 1
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DECL_PASS pass_interleave_sse, PASS_BIG 0
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%macro FFT_CALC_FUNC 0
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cglobal fft_calc, 2,5,8
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mov r3d, [r0 + FFTContext.nbits]
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PUSH r1
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@ -598,23 +602,43 @@ cglobal fft_calc, 2,5,8
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FFT_DISPATCH _interleave %+ SUFFIX, r1
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POP rcx
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POP r4
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cmp rcx, 4
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cmp rcx, 3+(mmsize/16)
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jg .end
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mov r2, -1
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add rcx, 3
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shl r2, cl
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sub r4, r2
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.loop
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%if mmsize == 8
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PSWAPD m0, [r4 + r2 + 4]
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mova [r4 + r2 + 4], m0
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%else
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movaps xmm0, [r4 + r2]
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movaps xmm1, xmm0
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unpcklps xmm0, [r4 + r2 + 16]
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unpckhps xmm1, [r4 + r2 + 16]
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movaps [r4 + r2], xmm0
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movaps [r4 + r2 + 16], xmm1
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add r2, 32
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%endif
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add r2, mmsize*2
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jl .loop
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.end:
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%if cpuflag(3dnow)
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femms
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RET
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%else
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REP_RET
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%endif
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%endmacro
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%if ARCH_X86_32
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INIT_MMX 3dnow
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FFT_CALC_FUNC
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INIT_MMX 3dnow2
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FFT_CALC_FUNC
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%endif
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INIT_XMM sse
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FFT_CALC_FUNC
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cglobal fft_permute, 2,7,1
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mov r4, [r0 + FFTContext.revtab]
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@ -649,6 +673,7 @@ cglobal fft_permute, 2,7,1
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jl .loopcopy
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REP_RET
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%macro IMDCT_CALC_FUNC 0
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cglobal imdct_calc, 3,5,3
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mov r3d, [r0 + FFTContext.mdctsize]
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mov r4, [r0 + FFTContext.imdcthalf]
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@ -672,22 +697,45 @@ cglobal imdct_calc, 3,5,3
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POP r3
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lea r0, [r1 + 2*r3]
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mov r2, r3
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sub r3, 16
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sub r3, mmsize
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neg r2
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movaps xmm2, [ps_m1m1m1m1]
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mova m2, [ps_m1m1m1m1]
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.loop:
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movaps xmm0, [r1 + r3]
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movaps xmm1, [r0 + r2]
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shufps xmm0, xmm0, 0x1b
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shufps xmm1, xmm1, 0x1b
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xorps xmm0, xmm2
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movaps [r0 + r3], xmm1
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movaps [r1 + r2], xmm0
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sub r3, 16
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add r2, 16
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%if mmsize == 8
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PSWAPD m0, [r1 + r3]
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PSWAPD m1, [r0 + r2]
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pxor m0, m2
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%else
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mova m0, [r1 + r3]
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mova m1, [r0 + r2]
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shufps m0, m0, 0x1b
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shufps m1, m1, 0x1b
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xorps m0, m2
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%endif
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mova [r0 + r3], m1
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mova [r1 + r2], m0
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sub r3, mmsize
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add r2, mmsize
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jl .loop
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%if cpuflag(3dnow)
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femms
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RET
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%else
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REP_RET
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%endif
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%endmacro
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%if ARCH_X86_32
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INIT_MMX 3dnow
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IMDCT_CALC_FUNC
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INIT_MMX 3dnow2
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IMDCT_CALC_FUNC
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%endif
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INIT_XMM sse
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IMDCT_CALC_FUNC
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%if ARCH_X86_32
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INIT_MMX 3dnow
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%define mulps pfmul
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%define addps pfadd
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@ -698,6 +746,7 @@ DECL_PASS pass_3dnow, PASS_SMALL 1, [wq], [wq+o1q]
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DECL_PASS pass_interleave_3dnow, PASS_BIG 0
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%define pass_3dnow2 pass_3dnow
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%define pass_interleave_3dnow2 pass_interleave_3dnow
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%endif
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%ifdef PIC
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%define SECTION_REL - $$
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@ -761,12 +810,14 @@ DECL_FFT 6, _interleave
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INIT_XMM sse
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DECL_FFT 5
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DECL_FFT 5, _interleave
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%if ARCH_X86_32
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INIT_MMX 3dnow
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DECL_FFT 4
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DECL_FFT 4, _interleave
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INIT_MMX 3dnow2
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DECL_FFT 4
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DECL_FFT 4, _interleave
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%endif
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INIT_XMM sse
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%undef mulps
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@ -776,6 +827,37 @@ INIT_XMM sse
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%undef unpckhps
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%macro PREROTATER 5 ;-2*k, 2*k, input+n4, tcos+n8, tsin+n8
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%if mmsize == 8 ; j*2+2-n4, n4-2-j*2, input+n4, tcos+n8, tsin+n8
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PSWAPD m0, [%3+%2*4]
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movq m2, [%3+%1*4-8]
|
||||
movq m3, m0
|
||||
punpckldq m0, m2
|
||||
punpckhdq m2, m3
|
||||
movd m1, [%4+%1*2-4] ; tcos[j]
|
||||
movd m3, [%4+%2*2] ; tcos[n4-j-1]
|
||||
punpckldq m1, [%5+%1*2-4] ; tsin[j]
|
||||
punpckldq m3, [%5+%2*2] ; tsin[n4-j-1]
|
||||
|
||||
mova m4, m0
|
||||
PSWAPD m5, m1
|
||||
pfmul m0, m1
|
||||
pfmul m4, m5
|
||||
mova m6, m2
|
||||
PSWAPD m5, m3
|
||||
pfmul m2, m3
|
||||
pfmul m6, m5
|
||||
%if cpuflag(3dnow2)
|
||||
pfpnacc m0, m4
|
||||
pfpnacc m2, m6
|
||||
%else
|
||||
SBUTTERFLY dq, 0, 4, 1
|
||||
SBUTTERFLY dq, 2, 6, 3
|
||||
pxor m4, m7
|
||||
pxor m6, m7
|
||||
pfadd m0, m4
|
||||
pfadd m2, m6
|
||||
%endif
|
||||
%else
|
||||
movaps xmm0, [%3+%2*4]
|
||||
movaps xmm1, [%3+%1*4-0x10]
|
||||
movaps xmm2, xmm0
|
||||
@ -796,6 +878,7 @@ INIT_XMM sse
|
||||
movaps xmm0, xmm1
|
||||
unpcklps xmm1, xmm2
|
||||
unpckhps xmm0, xmm2
|
||||
%endif
|
||||
%endmacro
|
||||
|
||||
%macro CMUL 6 ;j, xmm0, xmm1, 3, 4, 5
|
||||
@ -864,6 +947,40 @@ INIT_XMM sse
|
||||
jl .post
|
||||
%endmacro
|
||||
|
||||
%macro CMUL_3DNOW 6
|
||||
mova m6, [%1+%2*2]
|
||||
mova %3, [%1+%2*2+8]
|
||||
mova %4, m6
|
||||
mova m7, %3
|
||||
pfmul m6, [%5+%2]
|
||||
pfmul %3, [%6+%2]
|
||||
pfmul %4, [%6+%2]
|
||||
pfmul m7, [%5+%2]
|
||||
pfsub %3, m6
|
||||
pfadd %4, m7
|
||||
%endmacro
|
||||
|
||||
%macro POSROTATESHUF_3DNOW 5 ;j, k, z+n8, tcos+n8, tsin+n8
|
||||
.post:
|
||||
CMUL_3DNOW %3, %1, m0, m1, %4, %5
|
||||
CMUL_3DNOW %3, %2, m2, m3, %4, %5
|
||||
movd [%3+%1*2+ 0], m0
|
||||
movd [%3+%2*2+12], m1
|
||||
movd [%3+%2*2+ 0], m2
|
||||
movd [%3+%1*2+12], m3
|
||||
psrlq m0, 32
|
||||
psrlq m1, 32
|
||||
psrlq m2, 32
|
||||
psrlq m3, 32
|
||||
movd [%3+%1*2+ 8], m0
|
||||
movd [%3+%2*2+ 4], m1
|
||||
movd [%3+%2*2+ 8], m2
|
||||
movd [%3+%1*2+ 4], m3
|
||||
sub %2, 8
|
||||
add %1, 8
|
||||
jl .post
|
||||
%endmacro
|
||||
|
||||
%macro DECL_IMDCT 1
|
||||
cglobal imdct_half, 3,12,8; FFTContext *s, FFTSample *output, const FFTSample *input
|
||||
%if ARCH_X86_64
|
||||
@ -893,22 +1010,34 @@ cglobal imdct_half, 3,12,8; FFTContext *s, FFTSample *output, const FFTSample *i
|
||||
push rrevtab
|
||||
%endif
|
||||
|
||||
sub r3, 4
|
||||
%if ARCH_X86_64
|
||||
sub r3, mmsize/4
|
||||
%if ARCH_X86_64 || mmsize == 8
|
||||
xor r4, r4
|
||||
sub r4, r3
|
||||
%endif
|
||||
%if notcpuflag(3dnow2) && mmsize == 8
|
||||
movd m7, [ps_m1m1m1m1]
|
||||
%endif
|
||||
.pre:
|
||||
%if ARCH_X86_64 == 0
|
||||
;unspill
|
||||
%if mmsize != 8
|
||||
xor r4, r4
|
||||
sub r4, r3
|
||||
mov rtsin, [esp+4]
|
||||
%endif
|
||||
mov rtcos, [esp+8]
|
||||
mov rtsin, [esp+4]
|
||||
%endif
|
||||
|
||||
PREROTATER r4, r3, r2, rtcos, rtsin
|
||||
%if ARCH_X86_64
|
||||
%if mmsize == 8
|
||||
mov r6, [esp] ; rrevtab = ptr+n8
|
||||
movzx r5, word [rrevtab+r4-2] ; rrevtab[j]
|
||||
movzx r6, word [rrevtab+r3] ; rrevtab[n4-j-1]
|
||||
mova [r1+r5*8], m0
|
||||
mova [r1+r6*8], m2
|
||||
add r4, 2
|
||||
%elif ARCH_X86_64
|
||||
movzx r5, word [rrevtab+r4-4]
|
||||
movzx r6, word [rrevtab+r4-2]
|
||||
movzx r10, word [rrevtab+r3]
|
||||
@ -929,7 +1058,7 @@ cglobal imdct_half, 3,12,8; FFTContext *s, FFTSample *output, const FFTSample *i
|
||||
movlps [r1+r5*8], xmm1
|
||||
movhps [r1+r4*8], xmm1
|
||||
%endif
|
||||
sub r3, 4
|
||||
sub r3, mmsize/4
|
||||
jns .pre
|
||||
|
||||
mov r5, r0
|
||||
@ -954,12 +1083,23 @@ cglobal imdct_half, 3,12,8; FFTContext *s, FFTSample *output, const FFTSample *i
|
||||
%1 r0, r1, r6, rtcos, rtsin
|
||||
%if ARCH_X86_64 == 0
|
||||
add esp, 12
|
||||
%endif
|
||||
%if mmsize == 8
|
||||
femms
|
||||
%endif
|
||||
RET
|
||||
%endmacro
|
||||
|
||||
DECL_IMDCT POSROTATESHUF
|
||||
|
||||
%if ARCH_X86_32
|
||||
INIT_MMX 3dnow
|
||||
DECL_IMDCT POSROTATESHUF_3DNOW
|
||||
|
||||
INIT_MMX 3dnow2
|
||||
DECL_IMDCT POSROTATESHUF_3DNOW
|
||||
%endif
|
||||
|
||||
INIT_YMM avx
|
||||
|
||||
%if HAVE_AVX
|
||||
|
||||
Loading…
Reference in New Issue
Block a user