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Merge commit '71a0472114574993df7035f4de9aa007e03817b8'
* commit '71a0472114574993df7035f4de9aa007e03817b8': checkasm: arm: report the first clobbered register in checkasm_checked_call Also includes446353ea18
,59aeed93e4
, and37961044c6
to avoid breaking too much stuff. Merged-by: Clément Bœsch <u@pkh.me>
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commit
9f1c81e5ec
@ -22,6 +22,12 @@
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#include "libavutil/arm/asm.S"
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/* override fpu so that NEON instructions are rejected */
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#if HAVE_VFP
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.fpu vfp
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ELF .eabi_attribute 10, 0 @ suppress Tag_FP_arch
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#endif
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const register_init, align=3
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.quad 0x21f86d66c8ca00ce
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.quad 0x75b6ba21077c48ad
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@ -33,8 +39,12 @@ const register_init, align=3
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.quad 0x249214109d5d1c88
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endconst
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const error_message
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.asciz "failed to preserve register"
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const error_message_fpscr
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.asciz "failed to preserve register FPSCR, changed bits: %x"
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error_message_gpr:
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.asciz "failed to preserve register r%d"
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error_message_vfp:
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.asciz "failed to preserve register d%d"
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endconst
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@ max number of args used by any asm function.
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@ -79,39 +89,45 @@ function checkasm_checked_call_\variant, export=1
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push {r0, r1}
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movrel r12, register_init
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mov r3, #0
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.ifc \variant, vfp
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.macro check_reg_vfp, dreg, inc=8
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ldrd r0, r1, [r12], #\inc
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vmov r2, lr, \dreg
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eor r0, r0, r2
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eor r1, r1, lr
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orr r3, r3, r0
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orr r3, r3, r1
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.macro check_reg_vfp, dreg, offset
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ldrd r2, r3, [r12, #8 * (\offset)]
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vmov r0, lr, \dreg
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eor r2, r2, r0
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eor r3, r3, lr
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orrs r2, r2, r3
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bne 4f
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.endm
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.irp n, 8, 9, 10, 11, 12, 13, 14
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check_reg_vfp d\n
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.irp n, 8, 9, 10, 11, 12, 13, 14, 15
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@ keep track of the checked double/SIMD register
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mov r1, #\n
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check_reg_vfp d\n, \n-8
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.endr
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check_reg_vfp d15, -56
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.purgem check_reg_vfp
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fmrx r0, FPSCR
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ldr r1, [sp, #8]
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eor r0, r0, r1
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fmrx r1, FPSCR
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ldr r3, [sp, #8]
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eor r1, r1, r3
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@ Ignore changes in bits 0-4 and 7
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bic r1, r1, #0x9f
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@ Ignore changes in the topmost 5 bits
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lsl r0, r0, #5
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orr r3, r3, r0
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bics r1, r1, #0xf8000000
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bne 3f
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.endif
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@ keep track of the checked GPR
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mov r1, #4
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.macro check_reg reg1, reg2=
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ldrd r0, r1, [r12], #8
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eor r0, r0, \reg1
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orrs r3, r3, r0
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ldrd r2, r3, [r12], #8
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eors r2, r2, \reg1
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bne 2f
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add r1, r1, #1
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.ifnb \reg2
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eor r1, r1, \reg2
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orrs r3, r3, r1
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eors r3, r3, \reg2
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bne 2f
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.endif
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add r1, r1, #1
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.endm
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check_reg r4, r5
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check_reg r6, r7
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@ -124,9 +140,16 @@ function checkasm_checked_call_\variant, export=1
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check_reg r10, r11
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.purgem check_reg
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beq 0f
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movrel r0, error_message
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b 0f
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4:
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movrel r0, error_message_vfp
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b 1f
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3:
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movrel r0, error_message_fpscr
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b 1f
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2:
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movrel r0, error_message_gpr
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1:
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blx X(checkasm_fail_func)
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0:
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pop {r0, r1}
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