virtualenv/FFmpeg
1
0
Fork 0
mirror of https://github.com/FFmpeg/FFmpeg.git synced 2024-12-28 20:53:54 +02:00
Code Issues Releases Activity

Merge commit '71a0472114574993df7035f4de9aa007e03817b8'

Browse Source 
* commit '71a0472114574993df7035f4de9aa007e03817b8':
  checkasm: arm: report the first clobbered register in checkasm_checked_call

Also includes 446353ea18, 59aeed93e4, and 37961044c6 to avoid breaking
too much stuff.

Merged-by: Clément Bœsch <u@pkh.me>
This commit is contained in:
Clément Bœsch 2017-01-24 19:17:38 +01:00
commit 9f1c81e5ec
1 changed files with 49 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

75
tests/checkasm/arm/checkasm.S
View File

@ -22,6 +22,12 @@
#include "libavutil/arm/asm.S" #include "libavutil/arm/asm.S"
/* override fpu so that NEON instructions are rejected */
#if HAVE_VFP
.fpu vfp
ELF .eabi_attribute 10, 0 @ suppress Tag_FP_arch
#endif
const register_init, align=3 const register_init, align=3
.quad 0x21f86d66c8ca00ce .quad 0x21f86d66c8ca00ce
.quad 0x75b6ba21077c48ad .quad 0x75b6ba21077c48ad
@ -33,8 +39,12 @@ const register_init, align=3
.quad 0x249214109d5d1c88 .quad 0x249214109d5d1c88
endconst endconst
const error_message const error_message_fpscr
.asciz "failed to preserve register" .asciz "failed to preserve register FPSCR, changed bits: %x"
error_message_gpr:
.asciz "failed to preserve register r%d"
error_message_vfp:
.asciz "failed to preserve register d%d"
endconst endconst
@ max number of args used by any asm function. @ max number of args used by any asm function.
@ -79,39 +89,45 @@ function checkasm_checked_call_\variant, export=1
push {r0, r1} push {r0, r1}
movrel r12, register_init movrel r12, register_init
mov r3, #0
.ifc \variant, vfp .ifc \variant, vfp
.macro check_reg_vfp, dreg, inc=8 .macro check_reg_vfp, dreg, offset
ldrd r0, r1, [r12], #\inc ldrd r2, r3, [r12, #8 * (\offset)]
vmov r2, lr, \dreg vmov r0, lr, \dreg
eor r0, r0, r2 eor r2, r2, r0
eor r1, r1, lr eor r3, r3, lr
orr r3, r3, r0 orrs r2, r2, r3
orr r3, r3, r1 bne 4f
.endm .endm
.irp n, 8, 9, 10, 11, 12, 13, 14 .irp n, 8, 9, 10, 11, 12, 13, 14, 15
check_reg_vfp d\n @ keep track of the checked double/SIMD register
mov r1, #\n
check_reg_vfp d\n, \n-8
.endr .endr
check_reg_vfp d15, -56
.purgem check_reg_vfp .purgem check_reg_vfp
fmrx r0, FPSCR fmrx r1, FPSCR
ldr r1, [sp, #8] ldr r3, [sp, #8]
eor r0, r0, r1 eor r1, r1, r3
@ Ignore changes in bits 0-4 and 7
bic r1, r1, #0x9f
@ Ignore changes in the topmost 5 bits @ Ignore changes in the topmost 5 bits
lsl r0, r0, #5 bics r1, r1, #0xf8000000
orr r3, r3, r0 bne 3f
.endif .endif
@ keep track of the checked GPR
mov r1, #4
.macro check_reg reg1, reg2= .macro check_reg reg1, reg2=
ldrd r0, r1, [r12], #8 ldrd r2, r3, [r12], #8
eor r0, r0, \reg1 eors r2, r2, \reg1
orrs r3, r3, r0 bne 2f
add r1, r1, #1
.ifnb \reg2 .ifnb \reg2
eor r1, r1, \reg2 eors r3, r3, \reg2
orrs r3, r3, r1 bne 2f
.endif .endif
add r1, r1, #1
.endm .endm
check_reg r4, r5 check_reg r4, r5
check_reg r6, r7 check_reg r6, r7
@ -124,9 +140,16 @@ function checkasm_checked_call_\variant, export=1
check_reg r10, r11 check_reg r10, r11
.purgem check_reg .purgem check_reg
beq 0f b 0f
4:
movrel r0, error_message movrel r0, error_message_vfp
b 1f
3:
movrel r0, error_message_fpscr
b 1f
2:
movrel r0, error_message_gpr
1:
blx X(checkasm_fail_func) blx X(checkasm_fail_func)
0: 0:
pop {r0, r1} pop {r0, r1}