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avcodec/mips/mpegvideo_mmi: Version 2 of the optimizations for loongson mmi
1. no longer use the register names directly and optimized code format 2. to be compatible with O32, specify type of address variable with mips_reg and handle the address variable with PTR_ operator Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
This commit is contained in:
Zhou Xiaoyong
Michael Niedermayer
parent
ccc3f4e710
commit
a20646bb24
@ -23,11 +23,14 @@
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*/
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*/
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#include "mpegvideo_mips.h"
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#include "mpegvideo_mips.h"
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#include "libavutil/mips/asmdefs.h"
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void ff_dct_unquantize_h263_intra_mmi(MpegEncContext *s, int16_t *block,
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void ff_dct_unquantize_h263_intra_mmi(MpegEncContext *s, int16_t *block,
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int n, int qscale)
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int n, int qscale)
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{
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{
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int64_t level, qmul, qadd, nCoeffs;
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int64_t level, qmul, qadd, nCoeffs;
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double ftmp[6];
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mips_reg addr[1];
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qmul = qscale << 1;
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qmul = qscale << 1;
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av_assert2(s->block_last_index[n]>=0 || s->h263_aic);
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av_assert2(s->block_last_index[n]>=0 || s->h263_aic);
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@ -49,48 +52,50 @@ void ff_dct_unquantize_h263_intra_mmi(MpegEncContext *s, int16_t *block,
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nCoeffs = s->inter_scantable.raster_end[s->block_last_index[n]];
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nCoeffs = s->inter_scantable.raster_end[s->block_last_index[n]];
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__asm__ volatile (
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__asm__ volatile (
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"xor $f12, $f12, $f12 \r\n"
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"xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
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"lwc1 $f12, %1 \n\r"
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"packsswh %[qmul], %[qmul], %[qmul] \n\t"
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"xor $f10, $f10, $f10 \r\n"
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"packsswh %[qmul], %[qmul], %[qmul] \n\t"
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"lwc1 $f10, %2 \r\n"
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"packsswh %[qadd], %[qadd], %[qadd] \n\t"
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"xor $f14, $f14, $f14 \r\n"
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"packsswh %[qadd], %[qadd], %[qadd] \n\t"
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"packsswh $f12, $f12, $f12 \r\n"
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"psubh %[ftmp0], %[ftmp0], %[qadd] \n\t"
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"packsswh $f12, $f12, $f12 \r\n"
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"xor %[ftmp5], %[ftmp5], %[ftmp5] \n\t"
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"packsswh $f10, $f10, $f10 \r\n"
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".p2align 4 \n\t"
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"packsswh $f10, $f10, $f10 \r\n"
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"1: \n\t"
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"psubh $f14, $f14, $f10 \r\n"
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PTR_ADDU "%[addr0], %[block], %[nCoeffs] \n\t"
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"xor $f8, $f8, $f8 \r\n"
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"gsldlc1 %[ftmp1], 0x07(%[addr0]) \n\t"
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".p2align 4 \r\n"
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"gsldrc1 %[ftmp1], 0x00(%[addr0]) \n\t"
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"1: \r\n"
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"gsldlc1 %[ftmp2], 0x0f(%[addr0]) \n\t"
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"daddu $8, %0, %3 \r\n"
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"gsldrc1 %[ftmp2], 0x08(%[addr0]) \n\t"
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"gsldlc1 $f0, 7($8) \r\n"
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"mov.d %[ftmp3], %[ftmp1] \n\t"
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"gsldrc1 $f0, 0($8) \r\n"
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"mov.d %[ftmp4], %[ftmp2] \n\t"
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"gsldlc1 $f2, 15($8) \r\n"
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"pmullh %[ftmp1], %[ftmp1], %[qmul] \n\t"
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"gsldrc1 $f2, 8($8) \r\n"
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"pmullh %[ftmp2], %[ftmp2], %[qmul] \n\t"
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"mov.d $f4, $f0 \r\n"
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"pcmpgth %[ftmp3], %[ftmp3], %[ftmp5] \n\t"
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"mov.d $f6, $f2 \r\n"
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"pcmpgth %[ftmp4], %[ftmp4], %[ftmp5] \n\t"
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"pmullh $f0, $f0, $f12 \r\n"
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"xor %[ftmp1], %[ftmp1], %[ftmp3] \n\t"
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"pmullh $f2, $f2, $f12 \r\n"
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"xor %[ftmp2], %[ftmp2], %[ftmp4] \n\t"
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"pcmpgth $f4, $f4, $f8 \r\n"
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"paddh %[ftmp1], %[ftmp1], %[ftmp0] \n\t"
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"pcmpgth $f6, $f6, $f8 \r\n"
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"paddh %[ftmp2], %[ftmp2], %[ftmp0] \n\t"
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"xor $f0, $f0, $f4 \r\n"
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"xor %[ftmp3], %[ftmp3], %[ftmp1] \n\t"
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"xor $f2, $f2, $f6 \r\n"
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"xor %[ftmp4], %[ftmp4], %[ftmp2] \n\t"
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"paddh $f0, $f0, $f14 \r\n"
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"pcmpeqh %[ftmp1], %[ftmp1], %[ftmp0] \n\t"
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"paddh $f2, $f2, $f14 \r\n"
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"pcmpeqh %[ftmp2], %[ftmp2], %[ftmp0] \n\t"
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"xor $f4, $f4, $f0 \r\n"
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"pandn %[ftmp1], %[ftmp1], %[ftmp3] \n\t"
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"xor $f6, $f6, $f2 \r\n"
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"pandn %[ftmp2], %[ftmp2], %[ftmp4] \n\t"
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"pcmpeqh $f0, $f0, $f14 \r\n"
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PTR_ADDIU "%[nCoeffs], %[nCoeffs], 0x10 \n\t"
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"pcmpeqh $f2, $f2, $f14 \r\n"
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"gssdlc1 %[ftmp1], 0x07(%[addr0]) \n\t"
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"pandn $f0, $f0, $f4 \r\n"
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"gssdrc1 %[ftmp1], 0x00(%[addr0]) \n\t"
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"pandn $f2, $f2, $f6 \r\n"
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"gssdlc1 %[ftmp2], 0x0f(%[addr0]) \n\t"
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"gssdlc1 $f0, 7($8) \r\n"
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"gssdrc1 %[ftmp2], 0x08(%[addr0]) \n\t"
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"gssdrc1 $f0, 0($8) \r\n"
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"blez %[nCoeffs], 1b \n\t"
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"gssdlc1 $f2, 15($8) \r\n"
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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"gssdrc1 $f2, 8($8) \r\n"
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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"addi %3, %3, 16 \r\n"
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[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
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"blez %3, 1b \r\n"
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[addr0]"=&r"(addr[0])
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::"r"(block+nCoeffs),"m"(qmul),"m"(qadd),"r"(2*(-nCoeffs))
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: [block]"r"((mips_reg)(block+nCoeffs)),
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:"$8","memory"
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[nCoeffs]"r"((mips_reg)(2*(-nCoeffs))),
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[qmul]"f"(qmul), [qadd]"f"(qadd)
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: "memory"
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);
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);
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block[0] = level;
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block[0] = level;
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@ -100,6 +105,8 @@ void ff_dct_unquantize_h263_inter_mmi(MpegEncContext *s, int16_t *block,
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int n, int qscale)
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int n, int qscale)
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{
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{
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int64_t qmul, qadd, nCoeffs;
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int64_t qmul, qadd, nCoeffs;
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double ftmp[6];
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mips_reg addr[1];
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qmul = qscale << 1;
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qmul = qscale << 1;
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qadd = (qscale - 1) | 1;
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qadd = (qscale - 1) | 1;
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@ -107,48 +114,50 @@ void ff_dct_unquantize_h263_inter_mmi(MpegEncContext *s, int16_t *block,
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nCoeffs = s->inter_scantable.raster_end[s->block_last_index[n]];
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nCoeffs = s->inter_scantable.raster_end[s->block_last_index[n]];
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__asm__ volatile (
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__asm__ volatile (
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"xor $f12, $f12, $f12 \r\n"
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"packsswh %[qmul], %[qmul], %[qmul] \n\t"
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"lwc1 $f12, %1 \r\n"
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"packsswh %[qmul], %[qmul], %[qmul] \n\t"
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"xor $f10, $f10, $f10 \r\n"
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"xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
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"lwc1 $f10, %2 \r\n"
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"packsswh %[qadd], %[qadd], %[qadd] \n\t"
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"packsswh $f12, $f12, $f12 \r\n"
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"packsswh %[qadd], %[qadd], %[qadd] \n\t"
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"packsswh $f12, $f12, $f12 \r\n"
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"psubh %[ftmp0], %[ftmp0], %[qadd] \n\t"
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"xor $f14, $f14, $f14 \r\n"
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"xor %[ftmp5], %[ftmp5], %[ftmp5] \n\t"
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"packsswh $f10, $f10, $f10 \r\n"
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".p2align 4 \n\t"
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"packsswh $f10, $f10, $f10 \r\n"
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"1: \n\t"
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"psubh $f14, $f14, $f10 \r\n"
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PTR_ADDU "%[addr0], %[block], %[nCoeffs] \n\t"
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"xor $f8, $f8, $f8 \r\n"
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"gsldlc1 %[ftmp1], 0x07(%[addr0]) \n\t"
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".p2align 4 \r\n"
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"gsldrc1 %[ftmp1], 0x00(%[addr0]) \n\t"
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"1: \r\n"
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"gsldlc1 %[ftmp2], 0x0f(%[addr0]) \n\t"
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"daddu $8, %0, %3 \r\n"
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"gsldrc1 %[ftmp2], 0x08(%[addr0]) \n\t"
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"gsldlc1 $f0, 7($8) \r\n"
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"mov.d %[ftmp3], %[ftmp1] \n\t"
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"gsldrc1 $f0, 0($8) \r\n"
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"mov.d %[ftmp4], %[ftmp2] \n\t"
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"gsldlc1 $f2, 15($8) \r\n"
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"pmullh %[ftmp1], %[ftmp1], %[qmul] \n\t"
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"gsldrc1 $f2, 8($8) \r\n"
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"pmullh %[ftmp2], %[ftmp2], %[qmul] \n\t"
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"mov.d $f4, $f0 \r\n"
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"pcmpgth %[ftmp3], %[ftmp3], %[ftmp5] \n\t"
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"mov.d $f6, $f2 \r\n"
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"pcmpgth %[ftmp4], %[ftmp4], %[ftmp5] \n\t"
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"pmullh $f0, $f0, $f12 \r\n"
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"xor %[ftmp1], %[ftmp1], %[ftmp3] \n\t"
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"pmullh $f2, $f2, $f12 \r\n"
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"xor %[ftmp2], %[ftmp2], %[ftmp4] \n\t"
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"pcmpgth $f4, $f4, $f8 \r\n"
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"paddh %[ftmp1], %[ftmp1], %[ftmp0] \n\t"
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"pcmpgth $f6, $f6, $f8 \r\n"
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"paddh %[ftmp2], %[ftmp2], %[ftmp0] \n\t"
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"xor $f0, $f0, $f4 \r\n"
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"xor %[ftmp3], %[ftmp3], %[ftmp1] \n\t"
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"xor $f2, $f2, $f6 \r\n"
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"xor %[ftmp4], %[ftmp4], %[ftmp2] \n\t"
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"paddh $f0, $f0, $f14 \r\n"
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"pcmpeqh %[ftmp1], %[ftmp1], %[ftmp0] \n\t"
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"paddh $f2, $f2, $f14 \r\n"
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"pcmpeqh %[ftmp2], %[ftmp2], %[ftmp0] \n\t"
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"xor $f4, $f4, $f0 \r\n"
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"pandn %[ftmp1], %[ftmp1], %[ftmp3] \n\t"
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"xor $f6, $f6, $f2 \r\n"
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"pandn %[ftmp2], %[ftmp2], %[ftmp4] \n\t"
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"pcmpeqh $f0, $f0, $f14 \r\n"
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PTR_ADDIU "%[nCoeffs], %[nCoeffs], 0x10 \n\t"
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"pcmpeqh $f2, $f2, $f14 \r\n"
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"gssdlc1 %[ftmp1], 0x07(%[addr0]) \n\t"
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"pandn $f0, $f0, $f4 \r\n"
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"gssdrc1 %[ftmp1], 0x00(%[addr0]) \n\t"
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"pandn $f2, $f2, $f6 \r\n"
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"gssdlc1 %[ftmp2], 0x0f(%[addr0]) \n\t"
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"gssdlc1 $f0, 7($8) \r\n"
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"gssdrc1 %[ftmp2], 0x08(%[addr0]) \n\t"
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"gssdrc1 $f0, 0($8) \r\n"
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"blez %[nCoeffs], 1b \n\t"
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"gssdlc1 $f2, 15($8) \r\n"
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: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
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"gssdrc1 $f2, 8($8) \r\n"
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[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
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"addi %3, %3, 16 \r\n"
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[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
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"blez %3, 1b \r\n"
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[addr0]"=&r"(addr[0])
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::"r"(block+nCoeffs),"m"(qmul),"m"(qadd),"r"(2*(-nCoeffs))
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: [block]"r"((mips_reg)(block+nCoeffs)),
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: "$8","memory"
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[nCoeffs]"r"((mips_reg)(2*(-nCoeffs))),
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[qmul]"f"(qmul), [qadd]"f"(qadd)
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: "memory"
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);
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);
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}
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}
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@ -158,6 +167,9 @@ void ff_dct_unquantize_mpeg1_intra_mmi(MpegEncContext *s, int16_t *block,
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int64_t nCoeffs;
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int64_t nCoeffs;
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const uint16_t *quant_matrix;
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const uint16_t *quant_matrix;
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int block0;
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int block0;
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double ftmp[10];
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uint64_t tmp[1];
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mips_reg addr[1];
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av_assert2(s->block_last_index[n]>=0);
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av_assert2(s->block_last_index[n]>=0);
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nCoeffs = s->intra_scantable.raster_end[s->block_last_index[n]] + 1;
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nCoeffs = s->intra_scantable.raster_end[s->block_last_index[n]] + 1;
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@ -171,60 +183,68 @@ void ff_dct_unquantize_mpeg1_intra_mmi(MpegEncContext *s, int16_t *block,
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quant_matrix = s->intra_matrix;
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quant_matrix = s->intra_matrix;
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__asm__ volatile (
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__asm__ volatile (
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"pcmpeqh $f14, $f14, $f14 \r\n"
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"dli %[tmp0], 0x0f \n\t"
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"dli $10, 15 \r\n"
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"pcmpeqh %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
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"dmtc1 $10, $f16 \r\n"
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"dmtc1 %[tmp0], %[ftmp4] \n\t"
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"xor $f12, $f12, $f12 \r\n"
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"dmtc1 %[qscale], %[ftmp1] \n\t"
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"lwc1 $f12, %2 \r\n"
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"psrlh %[ftmp0], %[ftmp0], %[ftmp4] \n\t"
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"psrlh $f14, $f14, $f16 \r\n"
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"packsswh %[ftmp1], %[ftmp1], %[ftmp1] \n\t"
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"packsswh $f12, $f12, $f12 \r\n"
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"packsswh %[ftmp1], %[ftmp1], %[ftmp1] \n\t"
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"packsswh $f12, $f12, $f12 \r\n"
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"or %[addr0], %[nCoeffs], $0 \n\t"
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"or $8, %3, $0 \r\n"
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".p2align 4 \n\t"
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".p2align 4 \r\n"
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"1: \n\t"
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"1: \r\n"
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"gsldxc1 %[ftmp2], 0x00(%[addr0], %[block]) \n\t"
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"gsldxc1 $f0, 0($8, %0) \r\n"
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"gsldxc1 %[ftmp3], 0x08(%[addr0], %[block]) \n\t"
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"gsldxc1 $f2, 8($8, %0) \r\n"
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"mov.d %[ftmp4], %[ftmp2] \n\t"
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"mov.d $f16, $f0 \r\n"
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"mov.d %[ftmp5], %[ftmp3] \n\t"
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"mov.d $f18, $f2 \r\n"
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"gsldxc1 %[ftmp6], 0x00(%[addr0], %[quant]) \n\t"
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"gsldxc1 $f8, 0($8, %1) \r\n"
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"gsldxc1 %[ftmp7], 0x08(%[addr0], %[quant]) \n\t"
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"gsldxc1 $f10, 8($8, %1) \r\n"
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"pmullh %[ftmp6], %[ftmp6], %[ftmp1] \n\t"
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"pmullh $f8, $f8, $f12 \r\n"
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"pmullh %[ftmp7], %[ftmp7], %[ftmp1] \n\t"
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"pmullh $f10, $f10, $f12 \r\n"
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"xor %[ftmp8], %[ftmp8], %[ftmp8] \n\t"
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"xor $f4, $f4, $f4 \r\n"
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"xor %[ftmp9], %[ftmp9], %[ftmp9] \n\t"
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"xor $f6, $f6, $f6 \r\n"
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"pcmpgth %[ftmp8], %[ftmp8], %[ftmp2] \n\t"
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"pcmpgth $f4, $f4, $f0 \r\n"
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"pcmpgth %[ftmp9], %[ftmp9], %[ftmp3] \n\t"
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"pcmpgth $f6, $f6, $f2 \r\n"
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"xor %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
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"xor $f0, $f0, $f4 \r\n"
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"xor %[ftmp3], %[ftmp3], %[ftmp9] \n\t"
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"xor $f2, $f2, $f6 \r\n"
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"psubh %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
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"psubh $f0, $f0, $f4 \r\n"
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"psubh %[ftmp3], %[ftmp3], %[ftmp9] \n\t"
|
||||||
"psubh $f2, $f2, $f6 \r\n"
|
"pmullh %[ftmp2], %[ftmp2], %[ftmp6] \n\t"
|
||||||
"pmullh $f0, $f0, $f8 \r\n"
|
"pmullh %[ftmp3], %[ftmp3], %[ftmp7] \n\t"
|
||||||
"pmullh $f2, $f2, $f10 \r\n"
|
"xor %[ftmp6], %[ftmp6], %[ftmp6] \n\t"
|
||||||
"xor $f8, $f8, $f8 \r\n"
|
"xor %[ftmp7], %[ftmp7], %[ftmp7] \n\t"
|
||||||
"xor $f10, $f10, $f10 \r\n"
|
"pcmpeqh %[ftmp6], %[ftmp6], %[ftmp4] \n\t"
|
||||||
"pcmpeqh $f8, $f8, $f16 \r\n"
|
"dli %[tmp0], 0x03 \n\t"
|
||||||
"pcmpeqh $f10, $f10, $f18 \r\n"
|
"pcmpeqh %[ftmp7], %[ftmp7], %[ftmp5] \n\t"
|
||||||
"dli $10, 3 \r\n"
|
"dmtc1 %[tmp0], %[ftmp4] \n\t"
|
||||||
"dmtc1 $10, $f16 \r\n"
|
"psrah %[ftmp2], %[ftmp2], %[ftmp4] \n\t"
|
||||||
"psrah $f0, $f0, $f16 \r\n"
|
"psrah %[ftmp3], %[ftmp3], %[ftmp4] \n\t"
|
||||||
"psrah $f2, $f2, $f16 \r\n"
|
"psubh %[ftmp2], %[ftmp2], %[ftmp0] \n\t"
|
||||||
"psubh $f0, $f0, $f14 \r\n"
|
"psubh %[ftmp3], %[ftmp3], %[ftmp0] \n\t"
|
||||||
"psubh $f2, $f2, $f14 \r\n"
|
"or %[ftmp2], %[ftmp2], %[ftmp0] \n\t"
|
||||||
"or $f0, $f0, $f14 \r\n"
|
"or %[ftmp3], %[ftmp3], %[ftmp0] \n\t"
|
||||||
"or $f2, $f2, $f14 \r\n"
|
"xor %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
|
||||||
"xor $f0, $f0, $f4 \r\n"
|
"xor %[ftmp3], %[ftmp3], %[ftmp9] \n\t"
|
||||||
"xor $f2, $f2, $f6 \r\n"
|
"psubh %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
|
||||||
"psubh $f0, $f0, $f4 \r\n"
|
"psubh %[ftmp3], %[ftmp3], %[ftmp9] \n\t"
|
||||||
"psubh $f2, $f2, $f6 \r\n"
|
"pandn %[ftmp6], %[ftmp6], %[ftmp2] \n\t"
|
||||||
"pandn $f8, $f8, $f0 \r\n"
|
"pandn %[ftmp7], %[ftmp7], %[ftmp3] \n\t"
|
||||||
"pandn $f10, $f10, $f2 \r\n"
|
"gssdxc1 %[ftmp6], 0x00(%[addr0], %[block]) \n\t"
|
||||||
"gssdxc1 $f8, 0($8, %0) \r\n"
|
"gssdxc1 %[ftmp7], 0x08(%[addr0], %[block]) \n\t"
|
||||||
"gssdxc1 $f10, 8($8, %0) \r\n"
|
PTR_ADDIU "%[addr0], %[addr0], 0x10 \n\t"
|
||||||
"addi $8, $8, 16 \r\n"
|
"bltz %[addr0], 1b \n\t"
|
||||||
"bltz $8, 1b \r\n"
|
: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
|
||||||
::"r"(block+nCoeffs),"r"(quant_matrix+nCoeffs),"m"(qscale),
|
[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
|
||||||
"g"(-2*nCoeffs)
|
[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
|
||||||
: "$8","$10","memory"
|
[ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
|
||||||
|
[ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]),
|
||||||
|
[tmp0]"=&r"(tmp[0]),
|
||||||
|
[addr0]"=&r"(addr[0])
|
||||||
|
: [block]"r"((mips_reg)(block+nCoeffs)),
|
||||||
|
[quant]"r"((mips_reg)(quant_matrix+nCoeffs)),
|
||||||
|
[nCoeffs]"r"((mips_reg)(2*(-nCoeffs))),
|
||||||
|
[qscale]"r"(qscale)
|
||||||
|
: "memory"
|
||||||
);
|
);
|
||||||
|
|
||||||
block[0] = block0;
|
block[0] = block0;
|
||||||
@ -235,132 +255,81 @@ void ff_dct_unquantize_mpeg1_inter_mmi(MpegEncContext *s, int16_t *block,
|
|||||||
{
|
{
|
||||||
int64_t nCoeffs;
|
int64_t nCoeffs;
|
||||||
const uint16_t *quant_matrix;
|
const uint16_t *quant_matrix;
|
||||||
|
double ftmp[10];
|
||||||
|
uint64_t tmp[1];
|
||||||
|
mips_reg addr[1];
|
||||||
|
|
||||||
av_assert2(s->block_last_index[n] >= 0);
|
av_assert2(s->block_last_index[n] >= 0);
|
||||||
nCoeffs = s->intra_scantable.raster_end[s->block_last_index[n]] + 1;
|
nCoeffs = s->intra_scantable.raster_end[s->block_last_index[n]] + 1;
|
||||||
quant_matrix = s->inter_matrix;
|
quant_matrix = s->inter_matrix;
|
||||||
|
|
||||||
__asm__ volatile (
|
__asm__ volatile (
|
||||||
"pcmpeqh $f14, $f14, $f14 \r\n"
|
"dli %[tmp0], 0x0f \n\t"
|
||||||
"dli $10, 15 \r\n"
|
"pcmpeqh %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
|
||||||
"dmtc1 $10, $f16 \r\n"
|
"dmtc1 %[tmp0], %[ftmp4] \n\t"
|
||||||
"xor $f12, $f12, $f12 \r\n"
|
"dmtc1 %[qscale], %[ftmp1] \n\t"
|
||||||
"lwc1 $f12, %2 \r\n"
|
"psrlh %[ftmp0], %[ftmp0], %[ftmp4] \n\t"
|
||||||
"psrlh $f14, $f14, $f16 \r\n"
|
"packsswh %[ftmp1], %[ftmp1], %[ftmp1] \n\t"
|
||||||
"packsswh $f12, $f12, $f12 \r\n"
|
"packsswh %[ftmp1], %[ftmp1], %[ftmp1] \n\t"
|
||||||
"packsswh $f12, $f12, $f12 \r\n"
|
"or %[addr0], %[nCoeffs], $0 \n\t"
|
||||||
"or $8, %3, $0 \r\n"
|
".p2align 4 \n\t"
|
||||||
".p2align 4 \r\n"
|
"1: \n\t"
|
||||||
"1: \r\n"
|
"gsldxc1 %[ftmp2], 0x00(%[addr0], %[block]) \n\t"
|
||||||
"gsldxc1 $f0, 0($8, %0) \r\n"
|
"gsldxc1 %[ftmp3], 0x08(%[addr0], %[block]) \n\t"
|
||||||
"gsldxc1 $f2, 8($8, %0) \r\n"
|
"mov.d %[ftmp4], %[ftmp2] \n\t"
|
||||||
"mov.d $f16, $f0 \r\n"
|
"mov.d %[ftmp5], %[ftmp3] \n\t"
|
||||||
"mov.d $f18, $f2 \r\n"
|
"gsldxc1 %[ftmp6], 0x00(%[addr0], %[quant]) \n\t"
|
||||||
"gsldxc1 $f8, 0($8, %1) \r\n"
|
"gsldxc1 %[ftmp7], 0x08(%[addr0], %[quant]) \n\t"
|
||||||
"gsldxc1 $f10, 8($8, %1) \r\n"
|
"pmullh %[ftmp6], %[ftmp6], %[ftmp1] \n\t"
|
||||||
"pmullh $f8, $f8, $f12 \r\n"
|
"pmullh %[ftmp7], %[ftmp7], %[ftmp1] \n\t"
|
||||||
"pmullh $f10, $f10, $f12 \r\n"
|
"xor %[ftmp8], %[ftmp8], %[ftmp8] \n\t"
|
||||||
"xor $f4, $f4, $f4 \r\n"
|
"xor %[ftmp9], %[ftmp9], %[ftmp9] \n\t"
|
||||||
"xor $f6, $f6, $f6 \r\n"
|
"pcmpgth %[ftmp8], %[ftmp8], %[ftmp2] \n\t"
|
||||||
"pcmpgth $f4, $f4, $f0 \r\n"
|
"pcmpgth %[ftmp9], %[ftmp9], %[ftmp3] \n\t"
|
||||||
"pcmpgth $f6, $f6, $f2 \r\n"
|
"xor %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
|
||||||
"xor $f0, $f0, $f4 \r\n"
|
"xor %[ftmp3], %[ftmp3], %[ftmp9] \n\t"
|
||||||
"xor $f2, $f2, $f6 \r\n"
|
"psubh %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
|
||||||
"psubh $f0, $f0, $f4 \r\n"
|
"psubh %[ftmp3], %[ftmp3], %[ftmp9] \n\t"
|
||||||
"psubh $f2, $f2, $f6 \r\n"
|
"paddh %[ftmp2], %[ftmp2], %[ftmp2] \n\t"
|
||||||
"paddh $f0, $f0, $f0 \r\n"
|
"paddh %[ftmp3], %[ftmp3], %[ftmp3] \n\t"
|
||||||
"paddh $f2, $f2, $f2 \r\n"
|
"paddh %[ftmp2], %[ftmp2], %[ftmp0] \n\t"
|
||||||
"paddh $f0, $f0, $f14 \r\n"
|
"paddh %[ftmp3], %[ftmp3], %[ftmp0] \n\t"
|
||||||
"paddh $f2, $f2, $f14 \r\n"
|
"pmullh %[ftmp2], %[ftmp2], %[ftmp6] \n\t"
|
||||||
"pmullh $f0, $f0, $f8 \r\n"
|
"pmullh %[ftmp3], %[ftmp3], %[ftmp7] \n\t"
|
||||||
"pmullh $f2, $f2, $f10 \r\n"
|
"xor %[ftmp6], %[ftmp6], %[ftmp6] \n\t"
|
||||||
"xor $f8, $f8, $f8 \r\n"
|
"xor %[ftmp7], %[ftmp7], %[ftmp7] \n\t"
|
||||||
"xor $f10, $f10, $f10 \r\n"
|
"pcmpeqh %[ftmp6], %[ftmp6], %[ftmp4] \n\t"
|
||||||
"pcmpeqh $f8, $f8, $f16 \r\n"
|
"dli %[tmp0], 0x04 \n\t"
|
||||||
"pcmpeqh $f10, $f10, $f18 \r\n"
|
"pcmpeqh %[ftmp7], %[ftmp7], %[ftmp5] \n\t"
|
||||||
"dli $10, 4 \r\n"
|
"dmtc1 %[tmp0], %[ftmp4] \n\t"
|
||||||
"dmtc1 $10, $f16 \r\n"
|
"psrah %[ftmp2], %[ftmp2], %[ftmp4] \n\t"
|
||||||
"psrah $f0, $f0, $f16 \r\n"
|
"psrah %[ftmp3], %[ftmp3], %[ftmp4] \n\t"
|
||||||
"psrah $f2, $f2, $f16 \r\n"
|
"psubh %[ftmp2], %[ftmp2], %[ftmp0] \n\t"
|
||||||
"psubh $f0, $f0, $f14 \r\n"
|
"psubh %[ftmp3], %[ftmp3], %[ftmp0] \n\t"
|
||||||
"psubh $f2, $f2, $f14 \r\n"
|
"or %[ftmp2], %[ftmp2], %[ftmp0] \n\t"
|
||||||
"or $f0, $f0, $f14 \r\n"
|
"or %[ftmp3], %[ftmp3], %[ftmp0] \n\t"
|
||||||
"or $f2, $f2, $f14 \r\n"
|
"xor %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
|
||||||
"xor $f0, $f0, $f4 \r\n"
|
"xor %[ftmp3], %[ftmp3], %[ftmp9] \n\t"
|
||||||
"xor $f2, $f2, $f6 \r\n"
|
"psubh %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
|
||||||
"psubh $f0, $f0, $f4 \r\n"
|
"psubh %[ftmp3], %[ftmp3], %[ftmp9] \n\t"
|
||||||
"psubh $f2, $f2, $f6 \r\n"
|
"pandn %[ftmp6], %[ftmp6], %[ftmp2] \n\t"
|
||||||
"pandn $f8, $f8, $f0 \r\n"
|
"pandn %[ftmp7], %[ftmp7], %[ftmp3] \n\t"
|
||||||
"pandn $f10, $f10, $f2 \r\n"
|
"gssdxc1 %[ftmp6], 0x00(%[addr0], %[block]) \n\t"
|
||||||
"gssdxc1 $f8, 0($8, %0) \r\n"
|
"gssdxc1 %[ftmp7], 0x08(%[addr0], %[block]) \n\t"
|
||||||
"gssdxc1 $f10, 8($8, %0) \r\n"
|
PTR_ADDIU "%[addr0], %[addr0], 0x10 \n\t"
|
||||||
"addi $8, $8, 16 \r\n"
|
"bltz %[addr0], 1b \n\t"
|
||||||
"bltz $8, 1b \r\n"
|
: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
|
||||||
::"r"(block+nCoeffs),"r"(quant_matrix+nCoeffs),"m"(qscale),
|
[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
|
||||||
"g"(-2*nCoeffs)
|
[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
|
||||||
:"$8","$10","memory"
|
[ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
|
||||||
);
|
[ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]),
|
||||||
}
|
[tmp0]"=&r"(tmp[0]),
|
||||||
|
[addr0]"=&r"(addr[0])
|
||||||
void ff_denoise_dct_mmi(MpegEncContext *s, int16_t *block)
|
: [block]"r"((mips_reg)(block+nCoeffs)),
|
||||||
{
|
[quant]"r"((mips_reg)(quant_matrix+nCoeffs)),
|
||||||
const int intra = s->mb_intra;
|
[nCoeffs]"r"((mips_reg)(2*(-nCoeffs))),
|
||||||
int *sum = s->dct_error_sum[intra];
|
[qscale]"r"(qscale)
|
||||||
uint16_t *offset = s->dct_offset[intra];
|
: "memory"
|
||||||
|
|
||||||
s->dct_count[intra]++;
|
|
||||||
|
|
||||||
__asm__ volatile(
|
|
||||||
"xor $f14, $f14, $f14 \r\n"
|
|
||||||
"1: \r\n"
|
|
||||||
"ldc1 $f4, 0(%[block]) \r\n"
|
|
||||||
"xor $f0, $f0, $f0 \r\n"
|
|
||||||
"ldc1 $f6, 8(%[block]) \r\n"
|
|
||||||
"xor $f2, $f2, $f2 \r\n"
|
|
||||||
"pcmpgth $f0, $f0, $f4 \r\n"
|
|
||||||
"pcmpgth $f2, $f2, $f6 \r\n"
|
|
||||||
"xor $f4, $f4, $f0 \r\n"
|
|
||||||
"xor $f6, $f6, $f2 \r\n"
|
|
||||||
"psubh $f4, $f4, $f0 \r\n"
|
|
||||||
"psubh $f6, $f6, $f2 \r\n"
|
|
||||||
"ldc1 $f12, 0(%[offset]) \r\n"
|
|
||||||
"mov.d $f8, $f4 \r\n"
|
|
||||||
"psubush $f4, $f4, $f12 \r\n"
|
|
||||||
"ldc1 $f12, 8(%[offset]) \r\n"
|
|
||||||
"mov.d $f10, $f6 \r\n"
|
|
||||||
"psubush $f6, $f6, $f12 \r\n"
|
|
||||||
"xor $f4, $f4, $f0 \r\n"
|
|
||||||
"xor $f6, $f6, $f2 \r\n"
|
|
||||||
"psubh $f4, $f4, $f0 \r\n"
|
|
||||||
"psubh $f6, $f6, $f2 \r\n"
|
|
||||||
"sdc1 $f4, 0(%[block]) \r\n"
|
|
||||||
"sdc1 $f6, 8(%[block]) \r\n"
|
|
||||||
"mov.d $f4, $f8 \r\n"
|
|
||||||
"mov.d $f6, $f10 \r\n"
|
|
||||||
"punpcklhw $f8, $f8, $f14 \r\n"
|
|
||||||
"punpckhhw $f4, $f4, $f14 \r\n"
|
|
||||||
"punpcklhw $f10, $f10, $f14 \r\n"
|
|
||||||
"punpckhhw $f6, $f6, $f14 \r\n"
|
|
||||||
"ldc1 $f0, 0(%[sum]) \r\n"
|
|
||||||
"paddw $f8, $f8, $f0 \r\n"
|
|
||||||
"ldc1 $f0, 8(%[sum]) \r\n"
|
|
||||||
"paddw $f4, $f4, $f0 \r\n"
|
|
||||||
"ldc1 $f0, 16(%[sum]) \r\n"
|
|
||||||
"paddw $f10, $f10, $f0 \r\n"
|
|
||||||
"ldc1 $f0, 24(%[sum]) \r\n"
|
|
||||||
"paddw $f6, $f6, $f0 \r\n"
|
|
||||||
"sdc1 $f8, 0(%[sum]) \r\n"
|
|
||||||
"sdc1 $f4, 8(%[sum]) \r\n"
|
|
||||||
"sdc1 $f10, 16(%[sum]) \r\n"
|
|
||||||
"sdc1 $f6, 24(%[sum]) \r\n"
|
|
||||||
"daddiu %[block], %[block], 16 \r\n"
|
|
||||||
"daddiu %[sum], %[sum], 32 \r\n"
|
|
||||||
"daddiu %[offset], %[offset], 16 \r\n"
|
|
||||||
"dsubu $8, %[block1], %[block] \r\n"
|
|
||||||
"bgtz $8, 1b \r\n"
|
|
||||||
: [block]"+r"(block),[sum]"+r"(sum),[offset]"+r"(offset)
|
|
||||||
: [block1]"r"(block+64)
|
|
||||||
: "$8","$f0","$f2","$f4","$f6","$f8","$f10","$f12","$f14"
|
|
||||||
);
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -370,6 +339,9 @@ void ff_dct_unquantize_mpeg2_intra_mmi(MpegEncContext *s, int16_t *block,
|
|||||||
uint64_t nCoeffs;
|
uint64_t nCoeffs;
|
||||||
const uint16_t *quant_matrix;
|
const uint16_t *quant_matrix;
|
||||||
int block0;
|
int block0;
|
||||||
|
double ftmp[10];
|
||||||
|
uint64_t tmp[1];
|
||||||
|
mips_reg addr[1];
|
||||||
|
|
||||||
assert(s->block_last_index[n]>=0);
|
assert(s->block_last_index[n]>=0);
|
||||||
|
|
||||||
@ -386,58 +358,135 @@ void ff_dct_unquantize_mpeg2_intra_mmi(MpegEncContext *s, int16_t *block,
|
|||||||
quant_matrix = s->intra_matrix;
|
quant_matrix = s->intra_matrix;
|
||||||
|
|
||||||
__asm__ volatile (
|
__asm__ volatile (
|
||||||
"pcmpeqh $f14, $f14, $f14 \r\n"
|
"dli %[tmp0], 0x0f \n\t"
|
||||||
"dli $10, 15 \r\n"
|
"pcmpeqh %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
|
||||||
"dmtc1 $10, $f16 \r\n"
|
"mtc1 %[tmp0], %[ftmp3] \n\t"
|
||||||
"xor $f12, $f12, $f12 \r\n"
|
"mtc1 %[qscale], %[ftmp9] \n\t"
|
||||||
"lwc1 $f12, %[qscale] \r\n"
|
"psrlh %[ftmp0], %[ftmp0], %[ftmp3] \n\t"
|
||||||
"psrlh $f14, $f14, $f16 \r\n"
|
"packsswh %[ftmp9], %[ftmp9], %[ftmp9] \n\t"
|
||||||
"packsswh $f12, $f12, $f12 \r\n"
|
"packsswh %[ftmp9], %[ftmp9], %[ftmp9] \n\t"
|
||||||
"packsswh $f12, $f12, $f12 \r\n"
|
"or %[addr0], %[nCoeffs], $0 \n\t"
|
||||||
"or $8, %[ncoeffs], $0 \r\n"
|
".p2align 4 \n\t"
|
||||||
".p2align 4 \r\n"
|
"1: \n\t"
|
||||||
"1: \r\n"
|
"gsldxc1 %[ftmp1], 0x00(%[addr0], %[block]) \n\t"
|
||||||
"gsldxc1 $f0, 0($8, %[block]) \r\n"
|
"gsldxc1 %[ftmp2], 0x08(%[addr0], %[block]) \n\t"
|
||||||
"gsldxc1 $f2, 8($8, %[block]) \r\n"
|
"mov.d %[ftmp3], %[ftmp1] \n\t"
|
||||||
"mov.d $f16, $f0 \r\n"
|
"mov.d %[ftmp4], %[ftmp2] \n\t"
|
||||||
"mov.d $f18, $f2 \r\n"
|
"gsldxc1 %[ftmp5], 0x00(%[addr0], %[quant]) \n\t"
|
||||||
"gsldxc1 $f8, 0($8, %[quant]) \r\n"
|
"gsldxc1 %[ftmp6], 0x00(%[addr0], %[quant]) \n\t"
|
||||||
"gsldxc1 $f10, 0($8, %[quant]) \r\n"
|
"pmullh %[ftmp5], %[ftmp5], %[ftmp9] \n\t"
|
||||||
"pmullh $f8, $f8, $f12 \r\n"
|
"pmullh %[ftmp6], %[ftmp6], %[ftmp9] \n\t"
|
||||||
"pmullh $f10, $f10, $f12 \r\n"
|
"xor %[ftmp7], %[ftmp7], %[ftmp7] \n\t"
|
||||||
"xor $f4, $f4, $f4 \r\n"
|
"xor %[ftmp8], %[ftmp8], %[ftmp8] \n\t"
|
||||||
"xor $f6, $f6, $f6 \r\n"
|
"pcmpgth %[ftmp7], %[ftmp7], %[ftmp1] \n\t"
|
||||||
"pcmpgth $f4, $f4, $f0 \r\n"
|
"pcmpgth %[ftmp8], %[ftmp8], %[ftmp2] \n\t"
|
||||||
"pcmpgth $f6, $f6, $f2 \r\n"
|
"xor %[ftmp1], %[ftmp1], %[ftmp7] \n\t"
|
||||||
"xor $f0, $f0, $f4 \r\n"
|
"xor %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
|
||||||
"xor $f2, $f2, $f6 \r\n"
|
"psubh %[ftmp1], %[ftmp1], %[ftmp7] \n\t"
|
||||||
"psubh $f0, $f0, $f4 \r\n"
|
"psubh %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
|
||||||
"psubh $f2, $f2, $f6 \r\n"
|
"pmullh %[ftmp1], %[ftmp1], %[ftmp5] \n\t"
|
||||||
"pmullh $f0, $f0, $f8 \r\n"
|
"pmullh %[ftmp2], %[ftmp2], %[ftmp6] \n\t"
|
||||||
"pmullh $f2, $f2, $f10 \r\n"
|
"xor %[ftmp5], %[ftmp5], %[ftmp5] \n\t"
|
||||||
"xor $f8, $f8, $f8 \r\n"
|
"xor %[ftmp6], %[ftmp6], %[ftmp6] \n\t"
|
||||||
"xor $f10, $f10, $f10 \r\n"
|
"pcmpeqh %[ftmp5], %[ftmp5], %[ftmp3] \n\t"
|
||||||
"pcmpeqh $f8, $f8, $f16 \r\n"
|
"dli %[tmp0], 0x03 \n\t"
|
||||||
"pcmpeqh $f10 ,$f10, $f18 \r\n"
|
"pcmpeqh %[ftmp6] , %[ftmp6], %[ftmp4] \n\t"
|
||||||
"dli $10, 3 \r\n"
|
"mtc1 %[tmp0], %[ftmp3] \n\t"
|
||||||
"dmtc1 $10, $f16 \r\n"
|
"psrah %[ftmp1], %[ftmp1], %[ftmp3] \n\t"
|
||||||
"psrah $f0, $f0, $f16 \r\n"
|
"psrah %[ftmp2], %[ftmp2], %[ftmp3] \n\t"
|
||||||
"psrah $f2, $f2, $f16 \r\n"
|
"xor %[ftmp1], %[ftmp1], %[ftmp7] \n\t"
|
||||||
"xor $f0, $f0, $f4 \r\n"
|
"xor %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
|
||||||
"xor $f2, $f2, $f6 \r\n"
|
"psubh %[ftmp1], %[ftmp1], %[ftmp7] \n\t"
|
||||||
"psubh $f0, $f0, $f4 \r\n"
|
"psubh %[ftmp2], %[ftmp2], %[ftmp8] \n\t"
|
||||||
"psubh $f2, $f2, $f6 \r\n"
|
"pandn %[ftmp5], %[ftmp5], %[ftmp1] \n\t"
|
||||||
"pandn $f8, $f8, $f0 \r\n"
|
"pandn %[ftmp6], %[ftmp6], %[ftmp2] \n\t"
|
||||||
"pandn $f10, $f10, $f2 \r\n"
|
PTR_ADDIU "%[addr0], %[addr0], 0x10 \n\t"
|
||||||
"gssdxc1 $f8, 0($8, %[block]) \r\n"
|
"gssdxc1 %[ftmp5], 0x00(%[addr0], %[block]) \n\t"
|
||||||
"gssdxc1 $f10, 8($8, %[block]) \r\n"
|
"gssdxc1 %[ftmp6], 0x08(%[addr0], %[block]) \n\t"
|
||||||
"daddiu $8, $8, 16 \r\n"
|
"blez %[addr0], 1b \n\t"
|
||||||
"blez $8, 1b \r\n"
|
: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
|
||||||
::[block]"r"(block+nCoeffs),[quant]"r"(quant_matrix+nCoeffs),
|
[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
|
||||||
[qscale]"m"(qscale),[ncoeffs]"g"(-2*nCoeffs)
|
[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
|
||||||
: "$8","$10","$f0","$f2","$f4","$f6","$f8","$f10","$f12","$f14","$f16",
|
[ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
|
||||||
"$f18"
|
[ftmp8]"=&f"(ftmp[8]), [ftmp9]"=&f"(ftmp[9]),
|
||||||
|
[tmp0]"=&r"(tmp[0]),
|
||||||
|
[addr0]"=&r"(addr[0])
|
||||||
|
: [block]"r"((mips_reg)(block+nCoeffs)),
|
||||||
|
[quant]"r"((mips_reg)(quant_matrix+nCoeffs)),
|
||||||
|
[nCoeffs]"r"((mips_reg)(2*(-nCoeffs))),
|
||||||
|
[qscale]"r"(qscale)
|
||||||
|
: "memory"
|
||||||
);
|
);
|
||||||
|
|
||||||
block[0]= block0;
|
block[0]= block0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void ff_denoise_dct_mmi(MpegEncContext *s, int16_t *block)
|
||||||
|
{
|
||||||
|
const int intra = s->mb_intra;
|
||||||
|
int *sum = s->dct_error_sum[intra];
|
||||||
|
uint16_t *offset = s->dct_offset[intra];
|
||||||
|
double ftmp[8];
|
||||||
|
mips_reg addr[1];
|
||||||
|
|
||||||
|
s->dct_count[intra]++;
|
||||||
|
|
||||||
|
__asm__ volatile(
|
||||||
|
"xor %[ftmp0], %[ftmp0], %[ftmp0] \n\t"
|
||||||
|
"1: \n\t"
|
||||||
|
"ldc1 %[ftmp1], 0x00(%[block]) \n\t"
|
||||||
|
"xor %[ftmp2], %[ftmp2], %[ftmp2] \n\t"
|
||||||
|
"ldc1 %[ftmp3], 0x08(%[block]) \n\t"
|
||||||
|
"xor %[ftmp4], %[ftmp4], %[ftmp4] \n\t"
|
||||||
|
"pcmpgth %[ftmp2], %[ftmp2], %[ftmp1] \n\t"
|
||||||
|
"pcmpgth %[ftmp4], %[ftmp4], %[ftmp3] \n\t"
|
||||||
|
"xor %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
|
||||||
|
"xor %[ftmp3], %[ftmp3], %[ftmp4] \n\t"
|
||||||
|
"psubh %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
|
||||||
|
"psubh %[ftmp3], %[ftmp3], %[ftmp4] \n\t"
|
||||||
|
"ldc1 %[ftmp6], 0x00(%[offset]) \n\t"
|
||||||
|
"mov.d %[ftmp5], %[ftmp1] \n\t"
|
||||||
|
"psubush %[ftmp1], %[ftmp1], %[ftmp6] \n\t"
|
||||||
|
"ldc1 %[ftmp6], 0x08(%[offset]) \n\t"
|
||||||
|
"mov.d %[ftmp7], %[ftmp3] \n\t"
|
||||||
|
"psubush %[ftmp3], %[ftmp3], %[ftmp6] \n\t"
|
||||||
|
"xor %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
|
||||||
|
"xor %[ftmp3], %[ftmp3], %[ftmp4] \n\t"
|
||||||
|
"psubh %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
|
||||||
|
"psubh %[ftmp3], %[ftmp3], %[ftmp4] \n\t"
|
||||||
|
"sdc1 %[ftmp1], 0x00(%[block]) \n\t"
|
||||||
|
"sdc1 %[ftmp3], 0x08(%[block]) \n\t"
|
||||||
|
"mov.d %[ftmp1], %[ftmp5] \n\t"
|
||||||
|
"mov.d %[ftmp3], %[ftmp7] \n\t"
|
||||||
|
"punpcklhw %[ftmp5], %[ftmp5], %[ftmp0] \n\t"
|
||||||
|
"punpckhhw %[ftmp1], %[ftmp1], %[ftmp0] \n\t"
|
||||||
|
"punpcklhw %[ftmp7], %[ftmp7], %[ftmp0] \n\t"
|
||||||
|
"punpckhhw %[ftmp3], %[ftmp3], %[ftmp0] \n\t"
|
||||||
|
"ldc1 %[ftmp2], 0x00(%[sum]) \n\t"
|
||||||
|
"paddw %[ftmp5], %[ftmp5], %[ftmp2] \n\t"
|
||||||
|
"ldc1 %[ftmp2], 0x08(%[sum]) \n\t"
|
||||||
|
"paddw %[ftmp1], %[ftmp1], %[ftmp2] \n\t"
|
||||||
|
"ldc1 %[ftmp2], 0x10(%[sum]) \n\t"
|
||||||
|
"paddw %[ftmp7], %[ftmp7], %[ftmp2] \n\t"
|
||||||
|
"ldc1 %[ftmp2], 0x18(%[sum]) \n\t"
|
||||||
|
"paddw %[ftmp3], %[ftmp3], %[ftmp2] \n\t"
|
||||||
|
"sdc1 %[ftmp5], 0x00(%[sum]) \n\t"
|
||||||
|
"sdc1 %[ftmp1], 0x08(%[sum]) \n\t"
|
||||||
|
"sdc1 %[ftmp7], 0x10(%[sum]) \n\t"
|
||||||
|
"sdc1 %[ftmp3], 0x18(%[sum]) \n\t"
|
||||||
|
PTR_ADDIU "%[block], %[block], 0x10 \n\t"
|
||||||
|
PTR_ADDIU "%[sum], %[sum], 0x20 \n\t"
|
||||||
|
PTR_SUBU "%[addr0], %[block1], %[block] \n\t"
|
||||||
|
PTR_ADDIU "%[offset], %[offset], 0x10 \n\t"
|
||||||
|
"bgtz %[addr0], 1b \n\t"
|
||||||
|
: [ftmp0]"=&f"(ftmp[0]), [ftmp1]"=&f"(ftmp[1]),
|
||||||
|
[ftmp2]"=&f"(ftmp[2]), [ftmp3]"=&f"(ftmp[3]),
|
||||||
|
[ftmp4]"=&f"(ftmp[4]), [ftmp5]"=&f"(ftmp[5]),
|
||||||
|
[ftmp6]"=&f"(ftmp[6]), [ftmp7]"=&f"(ftmp[7]),
|
||||||
|
[addr0]"=&r"(addr[0]),
|
||||||
|
[block]"+&r"(block), [sum]"+&r"(sum),
|
||||||
|
[offset]"+&r"(offset)
|
||||||
|
: [block1]"r"(block+64)
|
||||||
|
: "memory"
|
||||||
|
);
|
||||||
|
}
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user