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nvenc: support d3d11 surface input
This commit is contained in:
@@ -45,6 +45,9 @@ const enum AVPixelFormat ff_nvenc_pix_fmts[] = {
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AV_PIX_FMT_0RGB32,
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AV_PIX_FMT_0RGB32,
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AV_PIX_FMT_0BGR32,
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AV_PIX_FMT_0BGR32,
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AV_PIX_FMT_CUDA,
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AV_PIX_FMT_CUDA,
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#if CONFIG_D3D11VA
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AV_PIX_FMT_D3D11,
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#endif
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AV_PIX_FMT_NONE
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AV_PIX_FMT_NONE
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};
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};
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@@ -172,6 +175,9 @@ static int nvenc_push_context(AVCodecContext *avctx)
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NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
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NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
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CUresult cu_res;
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CUresult cu_res;
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if (ctx->d3d11_device)
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return 0;
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cu_res = dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context);
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cu_res = dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context);
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if (cu_res != CUDA_SUCCESS) {
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if (cu_res != CUDA_SUCCESS) {
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av_log(avctx, AV_LOG_ERROR, "cuCtxPushCurrent failed\n");
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av_log(avctx, AV_LOG_ERROR, "cuCtxPushCurrent failed\n");
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@@ -188,6 +194,9 @@ static int nvenc_pop_context(AVCodecContext *avctx)
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CUresult cu_res;
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CUresult cu_res;
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CUcontext dummy;
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CUcontext dummy;
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if (ctx->d3d11_device)
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return 0;
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cu_res = dl_fn->cuda_dl->cuCtxPopCurrent(&dummy);
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cu_res = dl_fn->cuda_dl->cuCtxPopCurrent(&dummy);
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if (cu_res != CUDA_SUCCESS) {
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if (cu_res != CUDA_SUCCESS) {
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av_log(avctx, AV_LOG_ERROR, "cuCtxPopCurrent failed\n");
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av_log(avctx, AV_LOG_ERROR, "cuCtxPopCurrent failed\n");
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@@ -206,8 +215,13 @@ static av_cold int nvenc_open_session(AVCodecContext *avctx)
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params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
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params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
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params.apiVersion = NVENCAPI_VERSION;
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params.apiVersion = NVENCAPI_VERSION;
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params.device = ctx->cu_context;
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if (ctx->d3d11_device) {
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params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
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params.device = ctx->d3d11_device;
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params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
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} else {
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params.device = ctx->cu_context;
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params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
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}
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ret = p_nvenc->nvEncOpenEncodeSessionEx(¶ms, &ctx->nvencoder);
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ret = p_nvenc->nvEncOpenEncodeSessionEx(¶ms, &ctx->nvencoder);
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if (ret != NV_ENC_SUCCESS) {
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if (ret != NV_ENC_SUCCESS) {
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@@ -458,23 +472,48 @@ static av_cold int nvenc_setup_device(AVCodecContext *avctx)
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return AVERROR_BUG;
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return AVERROR_BUG;
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}
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}
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
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AVHWFramesContext *frames_ctx;
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AVHWFramesContext *frames_ctx;
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AVHWDeviceContext *hwdev_ctx;
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AVHWDeviceContext *hwdev_ctx;
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AVCUDADeviceContext *device_hwctx;
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AVCUDADeviceContext *cuda_device_hwctx = NULL;
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#if CONFIG_D3D11VA
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AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
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#endif
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int ret;
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int ret;
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if (avctx->hw_frames_ctx) {
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if (avctx->hw_frames_ctx) {
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frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
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frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
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device_hwctx = frames_ctx->device_ctx->hwctx;
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if (frames_ctx->format == AV_PIX_FMT_CUDA)
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cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
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#if CONFIG_D3D11VA
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else if (frames_ctx->format == AV_PIX_FMT_D3D11)
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d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
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#endif
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else
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return AVERROR(EINVAL);
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} else if (avctx->hw_device_ctx) {
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} else if (avctx->hw_device_ctx) {
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hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
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hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
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device_hwctx = hwdev_ctx->hwctx;
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if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
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cuda_device_hwctx = hwdev_ctx->hwctx;
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#if CONFIG_D3D11VA
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else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
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d3d11_device_hwctx = hwdev_ctx->hwctx;
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#endif
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else
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return AVERROR(EINVAL);
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} else {
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} else {
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return AVERROR(EINVAL);
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return AVERROR(EINVAL);
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}
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}
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ctx->cu_context = device_hwctx->cuda_ctx;
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if (cuda_device_hwctx) {
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ctx->cu_context = cuda_device_hwctx->cuda_ctx;
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}
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#if CONFIG_D3D11VA
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else if (d3d11_device_hwctx) {
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ctx->d3d11_device = d3d11_device_hwctx->device;
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ID3D11Device_AddRef(ctx->d3d11_device);
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}
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#endif
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ret = nvenc_open_session(avctx);
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ret = nvenc_open_session(avctx);
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if (ret < 0)
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if (ret < 0)
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@@ -1205,7 +1244,7 @@ static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
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NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
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NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
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allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
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allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
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ctx->surfaces[idx].in_ref = av_frame_alloc();
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ctx->surfaces[idx].in_ref = av_frame_alloc();
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if (!ctx->surfaces[idx].in_ref)
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if (!ctx->surfaces[idx].in_ref)
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return AVERROR(ENOMEM);
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return AVERROR(ENOMEM);
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@@ -1237,7 +1276,7 @@ static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
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nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
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nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
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if (nv_status != NV_ENC_SUCCESS) {
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if (nv_status != NV_ENC_SUCCESS) {
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int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
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int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
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if (avctx->pix_fmt != AV_PIX_FMT_CUDA)
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if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
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p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
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p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
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av_frame_free(&ctx->surfaces[idx].in_ref);
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av_frame_free(&ctx->surfaces[idx].in_ref);
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return err;
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return err;
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@@ -1351,7 +1390,7 @@ av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
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av_fifo_freep(&ctx->output_surface_queue);
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av_fifo_freep(&ctx->output_surface_queue);
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av_fifo_freep(&ctx->unused_surface_queue);
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av_fifo_freep(&ctx->unused_surface_queue);
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if (ctx->surfaces && avctx->pix_fmt == AV_PIX_FMT_CUDA) {
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if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
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for (i = 0; i < ctx->nb_surfaces; ++i) {
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for (i = 0; i < ctx->nb_surfaces; ++i) {
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if (ctx->surfaces[i].input_surface) {
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if (ctx->surfaces[i].input_surface) {
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p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->surfaces[i].in_map.mappedResource);
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p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->surfaces[i].in_map.mappedResource);
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@@ -1366,7 +1405,7 @@ av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
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if (ctx->surfaces) {
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if (ctx->surfaces) {
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for (i = 0; i < ctx->nb_surfaces; ++i) {
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for (i = 0; i < ctx->nb_surfaces; ++i) {
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if (avctx->pix_fmt != AV_PIX_FMT_CUDA)
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if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
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p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
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p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
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av_frame_free(&ctx->surfaces[i].in_ref);
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av_frame_free(&ctx->surfaces[i].in_ref);
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p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
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p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
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@@ -1388,6 +1427,13 @@ av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
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dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal);
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dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal);
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ctx->cu_context = ctx->cu_context_internal = NULL;
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ctx->cu_context = ctx->cu_context_internal = NULL;
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#if CONFIG_D3D11VA
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if (ctx->d3d11_device) {
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ID3D11Device_Release(ctx->d3d11_device);
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ctx->d3d11_device = NULL;
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}
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#endif
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nvenc_free_functions(&dl_fn->nvenc_dl);
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nvenc_free_functions(&dl_fn->nvenc_dl);
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cuda_free_functions(&dl_fn->cuda_dl);
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cuda_free_functions(&dl_fn->cuda_dl);
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@@ -1403,7 +1449,7 @@ av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
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NvencContext *ctx = avctx->priv_data;
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NvencContext *ctx = avctx->priv_data;
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int ret;
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int ret;
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
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AVHWFramesContext *frames_ctx;
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AVHWFramesContext *frames_ctx;
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if (!avctx->hw_frames_ctx) {
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if (!avctx->hw_frames_ctx) {
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av_log(avctx, AV_LOG_ERROR,
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av_log(avctx, AV_LOG_ERROR,
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@@ -1411,6 +1457,11 @@ av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
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return AVERROR(EINVAL);
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return AVERROR(EINVAL);
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}
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}
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frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
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frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
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if (frames_ctx->format != avctx->pix_fmt) {
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av_log(avctx, AV_LOG_ERROR,
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"hw_frames_ctx must match the GPU frame type\n");
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return AVERROR(EINVAL);
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}
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ctx->data_pix_fmt = frames_ctx->sw_format;
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ctx->data_pix_fmt = frames_ctx->sw_format;
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} else {
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} else {
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ctx->data_pix_fmt = avctx->pix_fmt;
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ctx->data_pix_fmt = avctx->pix_fmt;
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@@ -1516,7 +1567,9 @@ static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
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int i, idx, ret;
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int i, idx, ret;
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for (i = 0; i < ctx->nb_registered_frames; i++) {
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for (i = 0; i < ctx->nb_registered_frames; i++) {
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if (ctx->registered_frames[i].ptr == (CUdeviceptr)frame->data[0])
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
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return i;
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else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
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return i;
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return i;
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}
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}
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@@ -1525,12 +1578,19 @@ static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
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return idx;
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return idx;
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reg.version = NV_ENC_REGISTER_RESOURCE_VER;
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reg.version = NV_ENC_REGISTER_RESOURCE_VER;
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reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
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reg.width = frames_ctx->width;
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reg.width = frames_ctx->width;
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reg.height = frames_ctx->height;
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reg.height = frames_ctx->height;
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reg.pitch = frame->linesize[0];
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reg.pitch = frame->linesize[0];
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reg.resourceToRegister = frame->data[0];
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reg.resourceToRegister = frame->data[0];
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
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reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
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}
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else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
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reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
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reg.subResourceIndex = (intptr_t)frame->data[1];
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}
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reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
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reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
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if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
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if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
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av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
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av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
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@@ -1544,8 +1604,9 @@ static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
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return AVERROR_UNKNOWN;
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return AVERROR_UNKNOWN;
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}
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}
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ctx->registered_frames[idx].ptr = (CUdeviceptr)frame->data[0];
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ctx->registered_frames[idx].ptr = frame->data[0];
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ctx->registered_frames[idx].regptr = reg.registeredResource;
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ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
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ctx->registered_frames[idx].regptr = reg.registeredResource;
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return idx;
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return idx;
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}
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}
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@@ -1559,10 +1620,10 @@ static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame,
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int res;
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int res;
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NVENCSTATUS nv_status;
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NVENCSTATUS nv_status;
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
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int reg_idx = nvenc_register_frame(avctx, frame);
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int reg_idx = nvenc_register_frame(avctx, frame);
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if (reg_idx < 0) {
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if (reg_idx < 0) {
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av_log(avctx, AV_LOG_ERROR, "Could not register an input CUDA frame\n");
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av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
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return reg_idx;
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return reg_idx;
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}
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}
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@@ -1731,7 +1792,7 @@ static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSur
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nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
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nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
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if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
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p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, tmpoutsurf->in_map.mappedResource);
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p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, tmpoutsurf->in_map.mappedResource);
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av_frame_unref(tmpoutsurf->in_ref);
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av_frame_unref(tmpoutsurf->in_ref);
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ctx->registered_frames[tmpoutsurf->reg_idx].mapped = 0;
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ctx->registered_frames[tmpoutsurf->reg_idx].mapped = 0;
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@@ -1818,7 +1879,7 @@ int ff_nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
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NV_ENC_PIC_PARAMS pic_params = { 0 };
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NV_ENC_PIC_PARAMS pic_params = { 0 };
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pic_params.version = NV_ENC_PIC_PARAMS_VER;
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pic_params.version = NV_ENC_PIC_PARAMS_VER;
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if (!ctx->cu_context || !ctx->nvencoder)
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if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
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return AVERROR(EINVAL);
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return AVERROR(EINVAL);
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if (ctx->encoder_flushing)
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if (ctx->encoder_flushing)
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@@ -1915,7 +1976,7 @@ int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
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NvencContext *ctx = avctx->priv_data;
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NvencContext *ctx = avctx->priv_data;
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||||||
|
|
||||||
if (!ctx->cu_context || !ctx->nvencoder)
|
if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
|
||||||
return AVERROR(EINVAL);
|
return AVERROR(EINVAL);
|
||||||
|
|
||||||
if (output_ready(avctx, ctx->encoder_flushing)) {
|
if (output_ready(avctx, ctx->encoder_flushing)) {
|
||||||
|
@@ -27,6 +27,13 @@
|
|||||||
#include "libavutil/fifo.h"
|
#include "libavutil/fifo.h"
|
||||||
#include "libavutil/opt.h"
|
#include "libavutil/opt.h"
|
||||||
|
|
||||||
|
#if CONFIG_D3D11VA
|
||||||
|
#define COBJMACROS
|
||||||
|
#include "libavutil/hwcontext_d3d11va.h"
|
||||||
|
#else
|
||||||
|
typedef void ID3D11Device;
|
||||||
|
#endif
|
||||||
|
|
||||||
#include "avcodec.h"
|
#include "avcodec.h"
|
||||||
|
|
||||||
#define MAX_REGISTERED_FRAMES 64
|
#define MAX_REGISTERED_FRAMES 64
|
||||||
@@ -107,6 +114,7 @@ typedef struct NvencContext
|
|||||||
NV_ENC_CONFIG encode_config;
|
NV_ENC_CONFIG encode_config;
|
||||||
CUcontext cu_context;
|
CUcontext cu_context;
|
||||||
CUcontext cu_context_internal;
|
CUcontext cu_context_internal;
|
||||||
|
ID3D11Device *d3d11_device;
|
||||||
|
|
||||||
int nb_surfaces;
|
int nb_surfaces;
|
||||||
NvencSurface *surfaces;
|
NvencSurface *surfaces;
|
||||||
@@ -119,7 +127,8 @@ typedef struct NvencContext
|
|||||||
int encoder_flushing;
|
int encoder_flushing;
|
||||||
|
|
||||||
struct {
|
struct {
|
||||||
CUdeviceptr ptr;
|
void *ptr;
|
||||||
|
int ptr_index;
|
||||||
NV_ENC_REGISTERED_PTR regptr;
|
NV_ENC_REGISTERED_PTR regptr;
|
||||||
int mapped;
|
int mapped;
|
||||||
} registered_frames[MAX_REGISTERED_FRAMES];
|
} registered_frames[MAX_REGISTERED_FRAMES];
|
||||||
|
Reference in New Issue
Block a user