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arm: vp9itxfm16: Fix vertical alignment
Signed-off-by: Martin Storsjö <martin@martin.st>
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parent
b46d37e93a
commit
c1619318e5
@ -1395,25 +1395,25 @@ function idct32_1d_2x32_pass2_neon
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vld1.32 {d4}, [r2,:64], r12
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vld1.32 {d5}, [r2,:64], r12
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.if \neg == 0
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vadd.s32 d4, d4, d\a
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vadd.s32 d4, d4, d\a
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vld1.32 {d6}, [r2,:64], r12
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vadd.s32 d5, d5, d\b
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vadd.s32 d5, d5, d\b
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vld1.32 {d7}, [r2,:64], r12
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vadd.s32 d6, d6, d\c
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vadd.s32 d7, d7, d\d
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vadd.s32 d6, d6, d\c
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vadd.s32 d7, d7, d\d
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.else
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vsub.s32 d4, d4, d\a
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vsub.s32 d4, d4, d\a
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vld1.32 {d6}, [r2,:64], r12
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vsub.s32 d5, d5, d\b
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vsub.s32 d5, d5, d\b
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vld1.32 {d7}, [r2,:64], r12
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vsub.s32 d6, d6, d\c
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vsub.s32 d7, d7, d\d
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vsub.s32 d6, d6, d\c
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vsub.s32 d7, d7, d\d
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.endif
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vld1.32 {d2[]}, [r0,:32], r1
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vld1.32 {d2[1]}, [r0,:32], r1
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vrshr.s32 q2, q2, #6
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vrshr.s32 q2, q2, #6
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vld1.32 {d3[]}, [r0,:32], r1
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vrshr.s32 q3, q3, #6
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vrshr.s32 q3, q3, #6
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vld1.32 {d3[1]}, [r0,:32], r1
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sub r0, r0, r1, lsl #2
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vaddw.u16 q2, q2, d2
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