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Merge remote-tracking branch 'qatar/master'

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* qatar/master:
  vp8: Use 2 registers for dst_stride and src_stride in neon bilin filter

Conflicts:
	libavcodec/arm/vp8dsp_neon.S

Merged-by: Michael Niedermayer <michaelni@gmx.at>
This commit is contained in:
Michael Niedermayer 2014-02-06 15:33:54 +01:00
commit c73445a45c
1 changed files with 54 additions and 63 deletions
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117
libavcodec/arm/vp8dsp_neon.S
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@ -1576,12 +1576,11 @@ endconst
/* Bilinear MC */ /* Bilinear MC */
function ff_put_vp8_bilin16_h_neon, export=1 function ff_put_vp8_bilin16_h_neon, export=1
push {lr} ldr r12, [sp, #4] @ mx
ldr lr, [sp, #8] @ mx vdup.8 d0, r12
rsb r12, lr, #8 rsb r12, r12, #8
vdup.8 d0, lr
vdup.8 d1, r12 vdup.8 d1, r12
ldr r12, [sp, #4] @ h ldr r12, [sp] @ h
1: 1:
subs r12, r12, #2 subs r12, r12, #2
vld1.8 {d2-d4}, [r2], r3 vld1.8 {d2-d4}, [r2], r3
@ -1604,16 +1603,15 @@ function ff_put_vp8_bilin16_h_neon, export=1
vst1.8 {q3}, [r0,:128], r1 vst1.8 {q3}, [r0,:128], r1
bgt 1b bgt 1b
pop {pc} bx lr
endfunc endfunc
function ff_put_vp8_bilin16_v_neon, export=1 function ff_put_vp8_bilin16_v_neon, export=1
push {lr} ldr r12, [sp, #8] @ my
ldr lr, [sp, #12] @ my vdup.8 d0, r12
rsb r12, lr, #8 rsb r12, r12, #8
vdup.8 d0, lr
vdup.8 d1, r12 vdup.8 d1, r12
ldr r12, [sp, #4] @ h ldr r12, [sp] @ h
vld1.8 {q1}, [r2], r3 vld1.8 {q1}, [r2], r3
1: 1:
subs r12, r12, #2 subs r12, r12, #2
@ -1635,20 +1633,19 @@ function ff_put_vp8_bilin16_v_neon, export=1
vst1.8 {q3}, [r0,:128], r1 vst1.8 {q3}, [r0,:128], r1
bgt 1b bgt 1b
pop {pc} bx lr
endfunc endfunc
function ff_put_vp8_bilin16_hv_neon, export=1 function ff_put_vp8_bilin16_hv_neon, export=1
push {lr} ldr r12, [sp, #4] @ mx
ldr lr, [sp, #8] @ mx vdup.8 d0, r12
rsb r12, lr, #8 rsb r12, r12, #8
vdup.8 d0, lr
vdup.8 d1, r12 vdup.8 d1, r12
ldr lr, [sp, #12] @ my ldr r12, [sp, #8] @ my
rsb r12, lr, #8 vdup.8 d2, r12
vdup.8 d2, lr rsb r12, r12, #8
vdup.8 d3, r12 vdup.8 d3, r12
ldr r12, [sp, #4] @ h ldr r12, [sp] @ h
vld1.8 {d4-d6}, [r2], r3 vld1.8 {d4-d6}, [r2], r3
vext.8 q3, q2, q3, #1 vext.8 q3, q2, q3, #1
@ -1692,16 +1689,15 @@ function ff_put_vp8_bilin16_hv_neon, export=1
vst1.8 {q10}, [r0,:128], r1 vst1.8 {q10}, [r0,:128], r1
bgt 1b bgt 1b
pop {pc} bx lr
endfunc endfunc
function ff_put_vp8_bilin8_h_neon, export=1 function ff_put_vp8_bilin8_h_neon, export=1
push {lr} ldr r12, [sp, #4] @ mx
ldr lr, [sp, #8] @ mx vdup.8 d0, r12
rsb r12, lr, #8 rsb r12, r12, #8
vdup.8 d0, lr
vdup.8 d1, r12 vdup.8 d1, r12
ldr r12, [sp, #4] @ h ldr r12, [sp] @ h
1: 1:
subs r12, r12, #2 subs r12, r12, #2
vld1.8 {q1}, [r2], r3 vld1.8 {q1}, [r2], r3
@ -1718,16 +1714,15 @@ function ff_put_vp8_bilin8_h_neon, export=1
vst1.8 {d16}, [r0,:64], r1 vst1.8 {d16}, [r0,:64], r1
bgt 1b bgt 1b
pop {pc} bx lr
endfunc endfunc
function ff_put_vp8_bilin8_v_neon, export=1 function ff_put_vp8_bilin8_v_neon, export=1
push {lr} ldr r12, [sp, #8] @ my
ldr lr, [sp, #12] @ my vdup.8 d0, r12
rsb r12, lr, #8 rsb r12, r12, #8
vdup.8 d0, lr
vdup.8 d1, r12 vdup.8 d1, r12
ldr r12, [sp, #4] @ h ldr r12, [sp] @ h
vld1.8 {d2}, [r2], r3 vld1.8 {d2}, [r2], r3
1: 1:
subs r12, r12, #2 subs r12, r12, #2
@ -1743,20 +1738,19 @@ function ff_put_vp8_bilin8_v_neon, export=1
vst1.8 {d6}, [r0,:64], r1 vst1.8 {d6}, [r0,:64], r1
bgt 1b bgt 1b
pop {pc} bx lr
endfunc endfunc
function ff_put_vp8_bilin8_hv_neon, export=1 function ff_put_vp8_bilin8_hv_neon, export=1
push {lr} ldr r12, [sp, #4] @ mx
ldr lr, [sp, #8] @ mx vdup.8 d0, r12
rsb r12, lr, #8 rsb r12, r12, #8
vdup.8 d0, lr
vdup.8 d1, r12 vdup.8 d1, r12
ldr lr, [sp, #12] @ my ldr r12, [sp, #8] @ my
rsb r12, lr, #8 vdup.8 d2, r12
vdup.8 d2, lr rsb r12, r12, #8
vdup.8 d3, r12 vdup.8 d3, r12
ldr r12, [sp, #4] @ h ldr r12, [sp] @ h
vld1.8 {q2}, [r2], r3 vld1.8 {q2}, [r2], r3
vext.8 d5, d4, d5, #1 vext.8 d5, d4, d5, #1
@ -1785,16 +1779,15 @@ function ff_put_vp8_bilin8_hv_neon, export=1
vst1.8 {d23}, [r0,:64], r1 vst1.8 {d23}, [r0,:64], r1
bgt 1b bgt 1b
pop {pc} bx lr
endfunc endfunc
function ff_put_vp8_bilin4_h_neon, export=1 function ff_put_vp8_bilin4_h_neon, export=1
push {lr} ldr r12, [sp, #4] @ mx
ldr lr, [sp, #8] @ mx vdup.8 d0, r12
rsb r12, lr, #8 rsb r12, r12, #8
vdup.8 d0, lr
vdup.8 d1, r12 vdup.8 d1, r12
ldr r12, [sp, #4] @ h ldr r12, [sp] @ h
1: 1:
subs r12, r12, #2 subs r12, r12, #2
vld1.8 {d2}, [r2], r3 vld1.8 {d2}, [r2], r3
@ -1809,16 +1802,15 @@ function ff_put_vp8_bilin4_h_neon, export=1
vst1.32 {d4[1]}, [r0,:32], r1 vst1.32 {d4[1]}, [r0,:32], r1
bgt 1b bgt 1b
pop {pc} bx lr
endfunc endfunc
function ff_put_vp8_bilin4_v_neon, export=1 function ff_put_vp8_bilin4_v_neon, export=1
push {lr} ldr r12, [sp, #8] @ my
ldr lr, [sp, #12] @ my vdup.8 d0, r12
rsb r12, lr, #8 rsb r12, r12, #8
vdup.8 d0, lr
vdup.8 d1, r12 vdup.8 d1, r12
ldr r12, [sp, #4] @ h ldr r12, [sp] @ h
vld1.32 {d2[]}, [r2], r3 vld1.32 {d2[]}, [r2], r3
1: 1:
vld1.32 {d3[]}, [r2] vld1.32 {d3[]}, [r2]
@ -1833,20 +1825,19 @@ function ff_put_vp8_bilin4_v_neon, export=1
subs r12, r12, #2 subs r12, r12, #2
bgt 1b bgt 1b
pop {pc} bx lr
endfunc endfunc
function ff_put_vp8_bilin4_hv_neon, export=1 function ff_put_vp8_bilin4_hv_neon, export=1
push {lr} ldr r12, [sp, #4] @ mx
ldr lr, [sp, #8] @ mx vdup.8 d0, r12
rsb r12, lr, #8 rsb r12, r12, #8
vdup.8 d0, lr
vdup.8 d1, r12 vdup.8 d1, r12
ldr lr, [sp, #12] @ my ldr r12, [sp, #8] @ my
rsb r12, lr, #8 vdup.8 d2, r12
vdup.8 d2, lr rsb r12, r12, #8
vdup.8 d3, r12 vdup.8 d3, r12
ldr r12, [sp, #4] @ h ldr r12, [sp] @ h
vld1.8 {d4}, [r2], r3 vld1.8 {d4}, [r2], r3
vext.8 d5, d4, d4, #1 vext.8 d5, d4, d4, #1
@ -1872,5 +1863,5 @@ function ff_put_vp8_bilin4_hv_neon, export=1
vst1.32 {d20[1]}, [r0,:32], r1 vst1.32 {d20[1]}, [r0,:32], r1
bgt 1b bgt 1b
pop {pc} bx lr
endfunc endfunc