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aarch64: hevc: Produce plain neon versions of qpel_uni_w_hv
As the plain neon qpel_h functions process two rows at a time, we need to allocate storage for h+8 rows instead of h+7. AWS Graviton 3: put_hevc_qpel_uni_w_hv4_8_c: 422.2 put_hevc_qpel_uni_w_hv4_8_neon: 140.7 put_hevc_qpel_uni_w_hv4_8_i8mm: 100.7 put_hevc_qpel_uni_w_hv8_8_c: 1208.0 put_hevc_qpel_uni_w_hv8_8_neon: 268.2 put_hevc_qpel_uni_w_hv8_8_i8mm: 261.5 put_hevc_qpel_uni_w_hv16_8_c: 4297.2 put_hevc_qpel_uni_w_hv16_8_neon: 802.2 put_hevc_qpel_uni_w_hv16_8_i8mm: 731.2 put_hevc_qpel_uni_w_hv32_8_c: 15518.5 put_hevc_qpel_uni_w_hv32_8_neon: 3085.2 put_hevc_qpel_uni_w_hv32_8_i8mm: 2783.2 put_hevc_qpel_uni_w_hv64_8_c: 57254.5 put_hevc_qpel_uni_w_hv64_8_neon: 11787.5 put_hevc_qpel_uni_w_hv64_8_i8mm: 10659.0 Signed-off-by: Martin Storsjö <martin@martin.st>
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@ -305,6 +305,11 @@ NEON8_FNPROTO(epel_uni_w_hv, (uint8_t *_dst, ptrdiff_t _dststride,
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int height, int denom, int wx, int ox,
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intptr_t mx, intptr_t my, int width), _i8mm);
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NEON8_FNPROTO_PARTIAL_5(qpel_uni_w_hv, (uint8_t *_dst, ptrdiff_t _dststride,
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const uint8_t *_src, ptrdiff_t _srcstride,
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int height, int denom, int wx, int ox,
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intptr_t mx, intptr_t my, int width),);
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NEON8_FNPROTO_PARTIAL_5(qpel_uni_w_hv, (uint8_t *_dst, ptrdiff_t _dststride,
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const uint8_t *_src, ptrdiff_t _srcstride,
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int height, int denom, int wx, int ox,
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@ -446,6 +451,7 @@ av_cold void ff_hevc_dsp_init_aarch64(HEVCDSPContext *c, const int bit_depth)
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NEON8_FNASSIGN(c->put_hevc_qpel, 1, 1, qpel_hv,);
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NEON8_FNASSIGN(c->put_hevc_qpel_uni, 1, 1, qpel_uni_hv,);
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NEON8_FNASSIGN_PARTIAL_5(c->put_hevc_qpel_uni_w, 1, 1, qpel_uni_w_hv,);
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if (have_i8mm(cpu_flags)) {
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NEON8_FNASSIGN(c->put_hevc_epel, 0, 1, epel_h, _i8mm);
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@ -4164,7 +4164,7 @@ qpel_hv neon_i8mm
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DISABLE_I8MM
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#endif
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.macro QPEL_UNI_W_HV_HEADER width
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.macro QPEL_UNI_W_HV_HEADER width, suffix
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ldp x14, x15, [sp] // mx, my
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ldr w13, [sp, #16] // width
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stp x19, x30, [sp, #-80]!
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@ -4173,7 +4173,7 @@ DISABLE_I8MM
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stp x24, x25, [sp, #48]
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stp x26, x27, [sp, #64]
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mov x19, sp
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mov x11, #9088
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mov x11, #(MAX_PB_SIZE*(MAX_PB_SIZE+8)*2)
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sub sp, sp, x11
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mov x20, x0
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mov x21, x1
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@ -4190,7 +4190,16 @@ DISABLE_I8MM
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mov w26, #-6
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sub w26, w26, w5 // -shift
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mov w27, w13 // width
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bl X(ff_hevc_put_hevc_qpel_h\width\()_8_neon_i8mm)
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.ifc \suffix, neon
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.if \width >= 32
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mov w6, #\width
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bl X(ff_hevc_put_hevc_qpel_h32_8_neon)
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.else
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bl X(ff_hevc_put_hevc_qpel_h\width\()_8_\suffix)
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.endif
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.else
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bl X(ff_hevc_put_hevc_qpel_h\width\()_8_\suffix)
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.endif
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movrel x9, qpel_filters
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add x9, x9, x23, lsl #3
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ld1 {v0.8b}, [x9]
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@ -4552,33 +4561,39 @@ function hevc_put_hevc_qpel_uni_w_hv16_8_end_neon
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ret
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endfunc
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#if HAVE_I8MM
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ENABLE_I8MM
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function ff_hevc_put_hevc_qpel_uni_w_hv4_8_neon_i8mm, export=1
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QPEL_UNI_W_HV_HEADER 4
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.macro qpel_uni_w_hv suffix
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function ff_hevc_put_hevc_qpel_uni_w_hv4_8_\suffix, export=1
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QPEL_UNI_W_HV_HEADER 4, \suffix
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b hevc_put_hevc_qpel_uni_w_hv4_8_end_neon
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endfunc
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function ff_hevc_put_hevc_qpel_uni_w_hv8_8_neon_i8mm, export=1
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QPEL_UNI_W_HV_HEADER 8
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function ff_hevc_put_hevc_qpel_uni_w_hv8_8_\suffix, export=1
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QPEL_UNI_W_HV_HEADER 8, \suffix
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b hevc_put_hevc_qpel_uni_w_hv8_8_end_neon
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endfunc
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function ff_hevc_put_hevc_qpel_uni_w_hv16_8_neon_i8mm, export=1
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QPEL_UNI_W_HV_HEADER 16
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function ff_hevc_put_hevc_qpel_uni_w_hv16_8_\suffix, export=1
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QPEL_UNI_W_HV_HEADER 16, \suffix
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b hevc_put_hevc_qpel_uni_w_hv16_8_end_neon
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endfunc
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function ff_hevc_put_hevc_qpel_uni_w_hv32_8_neon_i8mm, export=1
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QPEL_UNI_W_HV_HEADER 32
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function ff_hevc_put_hevc_qpel_uni_w_hv32_8_\suffix, export=1
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QPEL_UNI_W_HV_HEADER 32, \suffix
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b hevc_put_hevc_qpel_uni_w_hv16_8_end_neon
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endfunc
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function ff_hevc_put_hevc_qpel_uni_w_hv64_8_neon_i8mm, export=1
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QPEL_UNI_W_HV_HEADER 64
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function ff_hevc_put_hevc_qpel_uni_w_hv64_8_\suffix, export=1
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QPEL_UNI_W_HV_HEADER 64, \suffix
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b hevc_put_hevc_qpel_uni_w_hv16_8_end_neon
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endfunc
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.endm
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qpel_uni_w_hv neon
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#if HAVE_I8MM
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ENABLE_I8MM
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qpel_uni_w_hv neon_i8mm
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DISABLE_I8MM
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#endif
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