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configure: Remove dcbzl check for e500v1 and e500v2 architectures

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The DCBZL instruction is not available for the e500v1 and e500v2
architectures, but may still be recognized by the toolchain, so we need to
remove the test for it explicitly for these architectures.

References: PowerPC™ e500 Core Family Reference Manual (Freescale)

Found-by: Ståle Kristoffersen <staalebk@ifi.uio.no>

Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
This commit is contained in:
Peter Krefting
2014-02-06 12:51:39 +01:00
committed by Michael Niedermayer
parent 474db7a696
commit d5733936d8
1 changed files with 2 additions and 1 deletions
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3
configure vendored
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@@ -4147,7 +4147,8 @@ elif enabled ppc; then
enable local_aligned_8 local_aligned_16 enable local_aligned_8 local_aligned_16
check_inline_asm dcbzl '"dcbzl 0, %0" :: "r"(0)' [ $cpu != e500 -a $cpu != e500v2 ] &&
check_inline_asm dcbzl '"dcbzl 0, %0" :: "r"(0)'
check_inline_asm ibm_asm '"add 0, 0, 0"' check_inline_asm ibm_asm '"add 0, 0, 0"'
check_inline_asm ppc4xx '"maclhw r10, r11, r12"' check_inline_asm ppc4xx '"maclhw r10, r11, r12"'
check_inline_asm xform_asm '"lwzx %1, %y0" :: "Z"(*(int*)0), "r"(0)' check_inline_asm xform_asm '"lwzx %1, %y0" :: "Z"(*(int*)0), "r"(0)'