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swscale/rgb2rgb: avoid S-regs in RISC-V V uyvytoyuv422
We can make do with callee-clobbered registers only now. As an added bonus, this makes the code XLEN-independent.
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@ -55,10 +55,8 @@ av_cold void rgb2rgb_init_riscv(void)
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shuffle_bytes_1230 = ff_shuffle_bytes_1230_rvv;
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shuffle_bytes_3012 = ff_shuffle_bytes_3012_rvv;
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interleaveBytes = ff_interleave_bytes_rvv;
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#if (__riscv_xlen == 64)
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uyvytoyuv422 = ff_uyvytoyuv422_rvv;
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yuyvtoyuv422 = ff_yuyvtoyuv422_rvv;
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#endif
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}
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#endif
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}
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@ -100,12 +100,9 @@ func ff_interleave_bytes_rvv, zve32x
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ret
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endfunc
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#if (__riscv_xlen == 64)
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.macro yuy2_to_i422p y_shift
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addi sp, sp, -16
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sd s0, (sp)
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addi a4, a4, 1
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lw s0, 16(sp)
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lw t6, (sp)
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srai a4, a4, 1 // pixel width -> chroma width
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1:
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mv t4, a4
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@ -131,14 +128,12 @@ endfunc
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add t2, t5, t2
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bnez t4, 2b
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add a3, a3, s0
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add a3, a3, t6
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add a0, a0, a6
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add a1, a1, a7
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add a2, a2, a7
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bnez a5, 1b
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ld s0, (sp)
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addi sp, sp, 16
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ret
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.endm
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@ -149,4 +144,3 @@ endfunc
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func ff_yuyvtoyuv422_rvv, zve32x
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yuy2_to_i422p 0
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endfunc
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#endif
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