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ARM: use Q/R inline asm operand modifiers only if supported

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Some compilers do not support the Q/R modifiers used to access
the low/high parts of a 64-bit register pair.  Check for this
and disable all uses of it when not supported.

Fixes bug #337.

Signed-off-by: Mans Rullgard <mans@mansr.com>
This commit is contained in:
Mans Rullgard 2012-08-07 17:43:29 +01:00
parent 4ab26cb4cc
commit ec9d2c15c1
3 changed files with 10 additions and 0 deletions
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2
configure vendored
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@ -1077,6 +1077,7 @@ HAVE_LIST="
alsa_asoundlib_h alsa_asoundlib_h
altivec_h altivec_h
arpa_inet_h arpa_inet_h
asm_mod_q
asm_mod_y asm_mod_y
attribute_may_alias attribute_may_alias
attribute_packed attribute_packed
@ -2792,6 +2793,7 @@ EOF
enabled neon && check_asm neon '"vadd.i16 q0, q0, q0"' enabled neon && check_asm neon '"vadd.i16 q0, q0, q0"'
enabled vfpv3 && check_asm vfpv3 '"vmov.f32 s0, #1.0"' enabled vfpv3 && check_asm vfpv3 '"vmov.f32 s0, #1.0"'
check_asm asm_mod_q '"add r0, %Q0, %R0" :: "r"((long long)0)'
check_asm asm_mod_y '"vmul.i32 d0, d0, %y0" :: "x"(0)' check_asm asm_mod_y '"vmul.i32 d0, d0, %y0" :: "x"(0)'
enabled_all armv6t2 shared !pic && enable_pic enabled_all armv6t2 shared !pic && enable_pic

4
libavutil/arm/intmath.h
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@ -97,6 +97,8 @@ static av_always_inline av_const int FASTDIV(int a, int b)
#endif /* HAVE_ARMV6 */ #endif /* HAVE_ARMV6 */
#if HAVE_ASM_MOD_Q
#define av_clipl_int32 av_clipl_int32_arm #define av_clipl_int32 av_clipl_int32_arm
static av_always_inline av_const int32_t av_clipl_int32_arm(int64_t a) static av_always_inline av_const int32_t av_clipl_int32_arm(int64_t a)
{ {
@ -110,6 +112,8 @@ static av_always_inline av_const int32_t av_clipl_int32_arm(int64_t a)
return x; return x;
} }
#endif /* HAVE_ASM_MOD_Q */
#endif /* HAVE_INLINE_ASM */ #endif /* HAVE_INLINE_ASM */
#endif /* AVUTIL_ARM_INTMATH_H */ #endif /* AVUTIL_ARM_INTMATH_H */

4
libavutil/arm/intreadwrite.h
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@ -61,6 +61,8 @@ static av_always_inline void AV_WN32(void *p, uint32_t v)
__asm__ ("str %1, %0" : "=m"(*(uint32_t *)p) : "r"(v)); __asm__ ("str %1, %0" : "=m"(*(uint32_t *)p) : "r"(v));
} }
#if HAVE_ASM_MOD_Q
#define AV_RN64 AV_RN64 #define AV_RN64 AV_RN64
static av_always_inline uint64_t AV_RN64(const void *p) static av_always_inline uint64_t AV_RN64(const void *p)
{ {
@ -82,6 +84,8 @@ static av_always_inline void AV_WN64(void *p, uint64_t v)
: "r"(v)); : "r"(v));
} }
#endif /* HAVE_ASM_MOD_Q */
#endif /* HAVE_INLINE_ASM */ #endif /* HAVE_INLINE_ASM */
#endif /* AVUTIL_ARM_INTREADWRITE_H */ #endif /* AVUTIL_ARM_INTREADWRITE_H */