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Add the rest of missing Reg_* macros to support both AMD-64 style regs and IA32 regs.
Not used yet, but should be once the SIMD code to accelerate Snow decoding is merged. Originally committed as revision 4731 to svn://svn.ffmpeg.org/ffmpeg/trunk
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@ -7,8 +7,18 @@
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#ifdef ARCH_X86_64
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# define REG_a "rax"
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# define REG_b "rbx"
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# define REG_c "rcx"
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# define REG_d "rdx"
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# define REG_D "rdi"
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# define REG_S "rsi"
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#else
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# define REG_a "eax"
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# define REG_b "ebx"
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# define REG_c "ecx"
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# define REG_d "edx"
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# define REG_D "edi"
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# define REG_S "esi"
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#endif
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/*
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