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libswscale/x86/yuv2rgb: add ssse3 version
Tested using this command: /ffmpeg -pix_fmt yuv420p -s 1920*1080 -i ArashRawYuv420.yuv \ -vcodec rawvideo -s 1920*1080 -pix_fmt rgb24 -f null /dev/null The fps increase from 389 to 640 on Intel(R) Core(TM) i7-8700K CPU @ 3.70GHz Signed-off-by: Ting Fu <ting.fu@intel.com>
This commit is contained in:
Ting Fu
Paul B Mahol
parent
767e95d560
commit
fc6a5883d6
@ -67,6 +67,15 @@ DECLARE_ASM_CONST(8, uint64_t, pb_07) = 0x0707070707070707ULL;
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#include "yuv2rgb_template.c"
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#endif /* HAVE_MMXEXT */
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//SSSE3 versions
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#if HAVE_SSSE3
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#undef RENAME
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#undef COMPILE_TEMPLATE_MMXEXT
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#define COMPILE_TEMPLATE_MMXEXT 0
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#define RENAME(a) a ## _ssse3
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#include "yuv2rgb_template.c"
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#endif
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#endif /* HAVE_X86ASM */
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av_cold SwsFunc ff_yuv2rgb_init_x86(SwsContext *c)
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@ -74,6 +83,35 @@ av_cold SwsFunc ff_yuv2rgb_init_x86(SwsContext *c)
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#if HAVE_X86ASM
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int cpu_flags = av_get_cpu_flags();
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if (EXTERNAL_SSSE3(cpu_flags)) {
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switch (c->dstFormat) {
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case AV_PIX_FMT_RGB32:
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if (c->srcFormat == AV_PIX_FMT_YUVA420P) {
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#if CONFIG_SWSCALE_ALPHA
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return yuva420_rgb32_ssse3;
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#endif
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break;
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} else
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return yuv420_rgb32_ssse3;
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case AV_PIX_FMT_BGR32:
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if (c->srcFormat == AV_PIX_FMT_YUVA420P) {
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#if CONFIG_SWSCALE_ALPHA
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return yuva420_bgr32_ssse3;
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#endif
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break;
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} else
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return yuv420_bgr32_ssse3;
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case AV_PIX_FMT_RGB24:
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return yuv420_rgb24_ssse3;
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case AV_PIX_FMT_BGR24:
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return yuv420_bgr24_ssse3;
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case AV_PIX_FMT_RGB565:
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return yuv420_rgb16_ssse3;
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case AV_PIX_FMT_RGB555:
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return yuv420_rgb15_ssse3;
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}
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}
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if (EXTERNAL_MMXEXT(cpu_flags)) {
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switch (c->dstFormat) {
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case AV_PIX_FMT_RGB24:
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@ -25,11 +25,18 @@
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SECTION_RODATA
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pw_00ff: times 4 dw 255
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pb_f8: times 8 db 248
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pb_e0: times 8 db 224
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pb_03: times 8 db 3
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pb_07: times 8 db 7
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; below variables are named like mask_dwXY, which means to preserve dword No.X & No.Y
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mask_dw036 : db -1, -1, 0, 0, 0, 0, -1, -1, 0, 0, 0, 0, -1, -1, 0, 0
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mask_dw147 : db 0, 0, -1, -1, 0, 0, 0, 0, -1, -1, 0, 0, 0, 0, -1, -1
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mask_dw25 : db 0, 0, 0, 0, -1, -1, 0, 0, 0, 0, -1, -1, 0, 0, 0, 0
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rgb24_shuf1: db 0, 1, 6, 7, 12, 13, 2, 3, 8, 9, 14, 15, 4, 5, 10, 11
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rgb24_shuf2: db 10, 11, 0, 1, 6, 7, 12, 13, 2, 3, 8, 9, 14, 15, 4, 5
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rgb24_shuf3: db 4, 5, 10, 11, 0, 1, 6, 7, 12, 13, 2, 3, 8, 9, 14, 15
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pw_00ff: times 8 dw 255
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pb_f8: times 16 db 248
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pb_e0: times 16 db 224
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pb_03: times 16 db 3
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pb_07: times 16 db 7
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mask_1101: dw -1, -1, 0, -1
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mask_0010: dw 0, 0, -1, 0
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@ -49,7 +56,11 @@ SECTION .text
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;-----------------------------------------------------------------------------
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%macro MOV_H2L 1
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psrlq %1, 32
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%if mmsize == 8
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psrlq %1, 32
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%else ; mmsize == 16
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psrldq %1, 8
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%endif
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%endmacro
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%macro yuv2rgb_fn 3
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@ -77,6 +88,7 @@ psrlq %1, 32
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%define m_blue m1
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%endif
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%if mmsize == 8
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%define time_num 1
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%define reg_num 8
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%define y_offset [pointer_c_ditherq + 8 * 8]
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@ -87,11 +99,45 @@ psrlq %1, 32
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%define y_coff [pointer_c_ditherq + 3 * 8]
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%define ub_coff [pointer_c_ditherq + 5 * 8]
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%define vr_coff [pointer_c_ditherq + 4 * 8]
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%elif mmsize == 16
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%define time_num 2
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%if ARCH_X86_32
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%define reg_num 8
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%define my_offset [pointer_c_ditherq + 8 * 8]
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%define mu_offset [pointer_c_ditherq + 9 * 8]
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%define mv_offset [pointer_c_ditherq + 10 * 8]
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%define mug_coff [pointer_c_ditherq + 7 * 8]
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%define mvg_coff [pointer_c_ditherq + 6 * 8]
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%define my_coff [pointer_c_ditherq + 3 * 8]
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%define mub_coff [pointer_c_ditherq + 5 * 8]
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%define mvr_coff [pointer_c_ditherq + 4 * 8]
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%else ; ARCH_X86_64
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%define reg_num 16
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%define y_offset m8
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%define u_offset m9
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%define v_offset m10
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%define ug_coff m11
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%define vg_coff m12
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%define y_coff m13
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%define ub_coff m14
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%define vr_coff m15
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%endif ; ARCH_X86_32/64
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%endif ; coeff define mmsize == 8/16
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cglobal %1_420_%2%3, GPR_num, GPR_num, reg_num, parameters
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%if ARCH_X86_64
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movsxd indexq, indexd
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%if mmsize == 16
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VBROADCASTSD y_offset, [pointer_c_ditherq + 8 * 8]
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VBROADCASTSD u_offset, [pointer_c_ditherq + 9 * 8]
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VBROADCASTSD v_offset, [pointer_c_ditherq + 10 * 8]
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VBROADCASTSD ug_coff, [pointer_c_ditherq + 7 * 8]
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VBROADCASTSD vg_coff, [pointer_c_ditherq + 6 * 8]
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VBROADCASTSD y_coff, [pointer_c_ditherq + 3 * 8]
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VBROADCASTSD ub_coff, [pointer_c_ditherq + 5 * 8]
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VBROADCASTSD vr_coff, [pointer_c_ditherq + 4 * 8]
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%endif
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%endif
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mova m_y, [py_2indexq + 2 * indexq]
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movh m_u, [pu_indexq + indexq]
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@ -108,6 +154,26 @@ cglobal %1_420_%2%3, GPR_num, GPR_num, reg_num, parameters
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psllw m1, 3
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psllw m6, 3
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psllw m7, 3
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%if (ARCH_X86_32 && mmsize == 16)
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VBROADCASTSD m2, mu_offset
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VBROADCASTSD m3, mv_offset
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VBROADCASTSD m4, my_offset
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psubsw m0, m2 ; U = U - 128
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psubsw m1, m3 ; V = V - 128
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psubw m6, m4
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psubw m7, m4
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VBROADCASTSD m2, mug_coff
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VBROADCASTSD m3, mvg_coff
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VBROADCASTSD m4, my_coff
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VBROADCASTSD m5, mub_coff
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pmulhw m2, m0
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pmulhw m3, m1
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pmulhw m6, m4
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pmulhw m7, m4
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pmulhw m0, m5
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VBROADCASTSD m4, mvr_coff
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pmulhw m1, m4
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%else ; ARCH_X86_64 || mmsize == 8
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psubsw m0, u_offset ; U = U - 128
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psubsw m1, v_offset ; V = V - 128
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psubw m6, y_offset
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@ -120,6 +186,7 @@ cglobal %1_420_%2%3, GPR_num, GPR_num, reg_num, parameters
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pmulhw m7, y_coff
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pmulhw m0, ub_coff
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pmulhw m1, vr_coff
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%endif
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paddsw m2, m3
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mova m3, m7
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mova m5, m7
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@ -142,6 +209,7 @@ cglobal %1_420_%2%3, GPR_num, GPR_num, reg_num, parameters
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punpcklbw m6, m_red ; B0 R1 B2 R3 B4 R5 B6 R7 B8 R9 ...
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mova m5, m3
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punpckhbw m2, m_blue ; G1 B1 G3 B3 G5 B5 G7 B7 G9 B9 ...
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%if mmsize == 8
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punpcklwd m3 ,m6 ; R0 G0 B0 R1 R2 G2 B2 R3
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punpckhwd m5, m6 ; R4 G4 B4 R5 R6 G6 B6 R7
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%if cpuflag(mmxext)
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@ -177,7 +245,33 @@ cglobal %1_420_%2%3, GPR_num, GPR_num, reg_num, parameters
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psrlq m5, 32
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movd [imageq + 20], m2 ; -- -- G7 B7
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movd [imageq + 18], m5 ; R6 G6 B6 R7
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%endif
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%endif ; mmsize = 8
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%else ; mmsize == 16
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pshufb m3, [rgb24_shuf1] ; r0 g0 r6 g6 r12 g12 r2 g2 r8 g8 r14 g14 r4 g4 r10 g10
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pshufb m6, [rgb24_shuf2] ; b10 r11 b0 r1 b6 r7 b12 r13 b2 r3 b8 r9 b14 r15 b4 r5
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pshufb m2, [rgb24_shuf3] ; g5 b5 g11 b11 g1 b1 g7 b7 g13 b13 g3 b3 g9 b9 g15 b15
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mova m7, [mask_dw036]
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mova m4, [mask_dw147]
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mova m5, [mask_dw25]
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pand m0, m7, m3 ; r0 g0 --- --- --- --- r2 g2 --- --- --- --- r4 g4 --- ---
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pand m1, m4, m6 ; --- --- b0 r1 --- --- --- --- b2 r3 --- --- --- --- b4 r5
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por m0, m1
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pand m1, m5, m2 ; --- --- --- --- g1 b1 --- --- --- --- g3 b3 --- --- --- ---
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por m0, m1 ; r0 g0 b0 r1 g1 b1 r2 g2 b2 r3 g3 b3 r4 g4 b4 r5
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pand m1, m7, m2 ; g5 b5 --- --- --- --- g7 b7 --- --- --- --- g9 b9 --- ---
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pand m7, m6 ; b10 r11 --- --- --- --- b12 r13 --- --- --- --- b14 r15 --- ---
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pand m6, m5 ; --- --- --- --- b6 r7 --- --- --- --- b8 r9 --- --- --- ---
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por m1, m6
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pand m6, m4, m3 ; --- --- r6 g6 --- --- --- --- r8 g8 --- --- --- --- r10 g10
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pand m2, m4 ; --- --- g11 b11 --- --- --- --- g13 b13 --- --- --- --- g15 b15
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pand m3, m5 ; --- --- --- --- r12 g12 --- --- --- --- r14 g14 --- --- --- ---
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por m2, m7
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por m1, m6 ; g5 b5 r6 g6 b6 r7 g7 b7 r8 g8 b8 r9 g9 b9 r10 g10
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por m2, m3 ; b10 r11 g11 b11 r12 g12 b12 r13 g13 b13 r14 g14 b14 r15 g15 b15
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mova [imageq], m0
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mova [imageq + 16], m1
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mova [imageq + 32], m2
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%endif ; mmsize = 16
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%else ; PACK RGB15/16/32
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packuswb m0, m1
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packuswb m3, m5
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@ -212,9 +306,18 @@ cglobal %1_420_%2%3, GPR_num, GPR_num, reg_num, parameters
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mova [imageq + 24 * time_num], m_alpha
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%else ; PACK RGB15/16
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%define depth 2
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%if cpuflag(ssse3)
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%define red_dither m3
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%define green_dither m4
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%define blue_dither m5
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VBROADCASTSD red_dither, [pointer_c_ditherq + 0 * 8]
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VBROADCASTSD green_dither, [pointer_c_ditherq + 1 * 8]
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VBROADCASTSD blue_dither, [pointer_c_ditherq + 2 * 8]
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%else ; cpuflag(mmx/mmxext)
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%define blue_dither [pointer_c_ditherq + 2 * 8]
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%define green_dither [pointer_c_ditherq + 1 * 8]
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%define red_dither [pointer_c_ditherq + 0 * 8]
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%endif
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%if %3 == 15
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%define gmask pb_03
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%define isRGB15 1
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@ -268,3 +371,13 @@ yuv2rgb_fn yuv, rgb, 16
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INIT_MMX mmxext
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yuv2rgb_fn yuv, rgb, 24
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yuv2rgb_fn yuv, bgr, 24
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INIT_XMM ssse3
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yuv2rgb_fn yuv, rgb, 24
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yuv2rgb_fn yuv, bgr, 24
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yuv2rgb_fn yuv, rgb, 32
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yuv2rgb_fn yuv, bgr, 32
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yuv2rgb_fn yuva, rgb, 32
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yuv2rgb_fn yuva, bgr, 32
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yuv2rgb_fn yuv, rgb, 15
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yuv2rgb_fn yuv, rgb, 16
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