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rv34dsp x86: implement MMX2 inverse transform
141 cycles down to 51. Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
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@ -22,6 +22,16 @@
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%include "x86inc.asm"
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%include "x86util.asm"
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SECTION_RODATA
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pw_row_coeffs: times 4 dw 13
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times 4 dw 17
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times 4 dw 7
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pd_512: times 2 dd 0x200
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pw_col_coeffs: dw 13, 13, 13, -13
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dw 17, 7, 7, -17
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dw 13, -13, 13, 13
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dw -7, 17, -17, -7
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SECTION .text
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%macro IDCT_DC_NOROUND 1
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@ -88,6 +98,74 @@ cglobal rv34_idct_dc_add_mmx, 3, 3
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movh [r2+r1], m5
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RET
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; Load coeffs and perform row transform
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; Output: coeffs in mm[0467], rounder in mm5
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%macro ROW_TRANSFORM 1
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pxor mm7, mm7
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mova mm0, [%1+ 0*8]
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mova mm1, [%1+ 1*8]
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mova mm2, [%1+ 2*8]
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mova mm3, [%1+ 3*8]
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mova [%1+ 0*8], mm7
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mova [%1+ 1*8], mm7
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mova [%1+ 2*8], mm7
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mova [%1+ 3*8], mm7
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mova mm4, mm0
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mova mm6, [pw_row_coeffs+ 0]
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paddsw mm0, mm2 ; b0 + b2
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psubsw mm4, mm2 ; b0 - b2
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pmullw mm0, mm6 ; *13 = z0
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pmullw mm4, mm6 ; *13 = z1
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mova mm5, mm1
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pmullw mm1, [pw_row_coeffs+ 8] ; b1*17
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pmullw mm5, [pw_row_coeffs+16] ; b1* 7
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mova mm7, mm3
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pmullw mm3, [pw_row_coeffs+ 8] ; b3*17
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pmullw mm7, [pw_row_coeffs+16] ; b3* 7
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paddsw mm1, mm7 ; z3 = b1*17 + b3* 7
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psubsw mm5, mm3 ; z2 = b1* 7 - b3*17
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mova mm7, mm0
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mova mm6, mm4
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paddsw mm0, mm1 ; z0 + z3
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psubsw mm7, mm1 ; z0 - z3
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paddsw mm4, mm5 ; z1 + z2
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psubsw mm6, mm5 ; z1 - z2
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mova mm5, [pd_512] ; 0x200
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%endmacro
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; ff_rv34_idct_add_mmx2(uint8_t *dst, ptrdiff_t stride, DCTELEM *block);
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%macro COL_TRANSFORM 4
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pshufw mm3, %2, 0xDD ; col. 1,3,1,3
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pshufw %2, %2, 0x88 ; col. 0,2,0,2
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pmaddwd %2, %3 ; 13*c0+13*c2 | 13*c0-13*c2 = z0 | z1
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pmaddwd mm3, %4 ; 17*c1+ 7*c3 | 7*c1-17*c3 = z3 | z2
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paddd %2, mm5
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pshufw mm1, %2, 01001110b ; z1 | z0
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pshufw mm2, mm3, 01001110b ; z2 | z3
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paddd %2, mm3 ; z0+z3 | z1+z2
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psubd mm1, mm2 ; z1-z2 | z0-z3
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movd mm3, %1
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psrad %2, 10
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pxor mm2, mm2
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psrad mm1, 10
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punpcklbw mm3, mm2
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packssdw %2, mm1
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paddw %2, mm3
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packuswb %2, %2
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movd %1, %2
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%endmacro
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INIT_MMX mmx2
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cglobal rv34_idct_add, 3,3,0, d, s, b
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ROW_TRANSFORM bq
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COL_TRANSFORM [dq], mm0, [pw_col_coeffs+ 0], [pw_col_coeffs+ 8]
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mova mm0, [pw_col_coeffs+ 0]
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COL_TRANSFORM [dq+sq], mm4, mm0, [pw_col_coeffs+ 8]
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mova mm4, [pw_col_coeffs+ 8]
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lea dq, [dq + 2*sq]
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COL_TRANSFORM [dq], mm6, mm0, mm4
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COL_TRANSFORM [dq+sq], mm7, mm0, mm4
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ret
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; ff_rv34_idct_dc_add_sse4(uint8_t *dst, int stride, int dc);
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INIT_XMM
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cglobal rv34_idct_dc_add_sse4, 3, 3, 6
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@ -28,6 +28,7 @@ void ff_rv34_idct_dc_mmx2(DCTELEM *block);
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void ff_rv34_idct_dc_noround_mmx2(DCTELEM *block);
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void ff_rv34_idct_dc_add_mmx(uint8_t *dst, ptrdiff_t stride, int dc);
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void ff_rv34_idct_dc_add_sse4(uint8_t *dst, ptrdiff_t stride, int dc);
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void ff_rv34_idct_add_mmx2(uint8_t *dst, ptrdiff_t stride, DCTELEM *block);
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av_cold void ff_rv34dsp_init_x86(RV34DSPContext* c, DSPContext *dsp)
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{
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@ -38,6 +39,7 @@ av_cold void ff_rv34dsp_init_x86(RV34DSPContext* c, DSPContext *dsp)
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c->rv34_idct_dc_add = ff_rv34_idct_dc_add_mmx;
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if (mm_flags & AV_CPU_FLAG_MMX2) {
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c->rv34_inv_transform_dc = ff_rv34_idct_dc_noround_mmx2;
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c->rv34_idct_add = ff_rv34_idct_add_mmx2;
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}
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if (mm_flags & AV_CPU_FLAG_SSE4)
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c->rv34_idct_dc_add = ff_rv34_idct_dc_add_sse4;
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