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Commit Graph

5 Commits

Author SHA1 Message Date
James Cowgill
157d6f0d5b mips: port optimizations to mips n64
This mainly consists of replacing all the pointer arithmatic 'addiu'
instructions with PTR_ADDIU which will handle the differences in pointer
sizes when compiled on 64 bit mips systems.

The header asmdefs.h contains the PTR_ macros which expend to the correct mips
instructions to manipulate registers containing pointers.

Signed-off-by: James Cowgill <james410@cowgill.org.uk>
Reviewed-by: Nedeljko Babic <Nedeljko.Babic@imgtec.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
2015-03-06 14:37:44 +01:00
Nedeljko Babic
d23aefa498 mips: inline assembly clobber list polishing
List of clobbered registers fixed and added where it is lacking.

Signed-off-by: Nedeljko Babic <nbabic@mips.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
2013-03-19 16:51:35 +01:00
Nedeljko Babic
304a1ed1e8 mips: Add dependencies on HAVE_INLINE_ASM
Add dependencies on HAVE_INLINE_ASM for files and parts of code
 where it is necessary.

Signed-off-by: Nedeljko Babic <nbabic@mips.com>
Reviewed-by: Vitor Sessak <vitor1001@gmail.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
2012-11-10 19:55:54 +01:00
Michael Niedermayer
dd0a9b78db replace all __volatile__ by volatile
__volatile__ can cause problems with some compilers and volatile is a standard keyword.

Found-by: Reimar Döffinger <Reimar.Doeffinger@gmx.de>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
2012-07-11 04:04:29 +02:00
Nedeljko Babic
3827a86eac Optimization of AMR NB and WB decoders for MIPS
AMR NB and WB decoders are optimized for MIPS architecture.
Appropriate Makefiles are changed accordingly.

Cnfigure script is changed in order to support optimizations.
 Optimizations are enabled by default when compiling is done for
  mips architecture.
 Appropriate cflags are automatically set.
 Support for several mips CPUs is added in configure script.

New ffmpeg options are added for disabling optimizations.

The FFMPEG option --disable-mipsfpu disables MIPS floating point
 optimizations.
The FFMPEG option --disable-mips32r2 disables MIPS32R2
 optimizations.
The FFMPEG option --disable-mipsdspr1 disables MIPS DSP ASE R1
 optimizations.
The FFMPEG option --disable-mipsdspr2 disables MIPS DSP ASE R2
 optimizations.

Signed-off-by: Nedeljko Babic <nbabic@mips.com>
Reviewed-by: Vitor Sessak <vitor1001@gmail.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
2012-06-11 21:12:39 +02:00