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Commit Graph

18 Commits

Author SHA1 Message Date
Diego Biurrun
82bd04b170 rv34: Drop now unnecessary dsputil dependencies 2013-02-06 11:30:54 +01:00
Diego Biurrun
79dad2a932 dsputil: Separate h264chroma 2013-02-06 11:30:53 +01:00
Diego Biurrun
88bd7fdc82 Drop DCTELEM typedef
It does not help as an abstraction and adds dsputil dependencies.

Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2013-01-22 18:32:56 -08:00
Jean-Baptiste Kempf
507dce2536 arm: call arm-specific rv34dsp init functions under if (ARCH_ARM)
Assign NEON specific function pointers after runtime check via
av_get_cpu_flags().

Signed-off-by: Janne Grunau <janne-libav@jannau.net>
2012-10-10 15:28:50 +02:00
Christophe GISQUET
272b252c01 rv40dsp: implement prescaled versions for biweight.
Quite often, the original weights are multiple of 512. By prescaling them
by 1/512 when they are computed (once per frame), no intermediate shifting
is needed, and no prescaling on each call either.

The x86 code already used that trick.

Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2012-04-10 10:06:48 -07:00
Ronald S. Bultje
3ab9a2a557 rv34: change most "int stride" into "ptrdiff_t stride".
This prevents having to sign-extend on 64-bit systems with 32-bit ints,
such as x86-64. Also fixes crashes on systems where we don't do it and
arguments are not in registers, such as Win64 for all weight functions.
2012-02-20 14:58:25 -08:00
Christophe GISQUET
9ba9c34024 rv34: 1-pass inter MB reconstruction
Implement 1-pass inverse transform and reconstruction for inter blocks.
2012-01-16 19:26:41 +01:00
Christophe GISQUET
d78062386e rv34: Intra 16x16 handling
Extract processing of intra 16x16 blocks from intra macroblock
processing.
Also implement a function performing inverse transform and block
reconstruction for DC-only blocks in 1 pass instead of 2.
2012-01-16 00:41:51 +01:00
Christophe GISQUET
3faa303a47 rv34: DC-only inverse transform
When decoding coefficients, detect whether the block is DC-only, and take
advantage of this knowledge to perform DC-only inverse transform.

This is achieved by:
- first, changing the 108x4 element modulo_three_table into a 108 element
  table (kind of base4), and accessing each value using mask and shifts.
- then, checking low bits for 0 (as they represent the presence of higher
  frequency coefficients)

Also provide x86 SIMD code for the DC-only inverse transform.

Signed-off-by: Kostya Shishkov <kostya.shishkov@gmail.com>
2012-01-12 09:52:33 +01:00
Christophe GISQUET
98f24ecd6c rv34: joint coefficient decoding and dequantization
Perform dequantization while decoding coefficients instead of performing it
on the entire coefficients buffer.

Since quantized coefficients are very sparse, this usually causes a small
speedup. Speedup of around 1% on Panda board compared to the removed here
neon code. Global speedup is probably around 3%.

Signed-off-by: Kostya Shishkov <kostya.shishkov@gmail.com>
2012-01-04 10:30:01 +01:00
Mans Rullgard
d8edf1b515 rv40: rearrange loop filter functions
This splits the loop filter functions into smaller, more SIMD-friendly
functions.

Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-12-14 11:26:30 +00:00
Mans Rullgard
40901fc14e rv34: move 4x4 dequant to RV34DSPContext
Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-12-13 12:05:34 +00:00
Janne Grunau
f5c05b9aa5 rv40: NEON optimised chroma MC
Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-12-06 13:48:25 +00:00
Janne Grunau
42d32cf53c rv34: NEON optimised inverse transform functions
Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-12-06 13:48:24 +00:00
Janne Grunau
bb8a6e03cc rv40: move loop filter to rv34dsp context
Signed-off-by: Mans Rullgard <mans@mansr.com>
2011-11-30 20:54:59 +00:00
Janne Grunau
1bca8f4bc5 rv34: move inverse transform functions to DSP context 2011-10-12 15:52:22 +02:00
Kostya Shishkov
b86ab38137 Add weighted motion compensation for RV40 B-frames
Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2011-08-11 16:07:58 -07:00
Kostya Shishkov
d241f51e0f Move RV3/4-specific DSP functions into their own context
Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2011-08-11 16:07:15 -07:00