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Commit Graph

417 Commits

Author SHA1 Message Date
Anton Mitrofanov
e428f3b30c x86inc: Enable AVX emulation in additional cases
Allows emulation to work when dst is equal to src2 as long as the
instruction is commutative, e.g. `addps m0, m1, m0`.
2016-04-20 19:16:22 +02:00
Anton Mitrofanov
4bd5583ace x86inc: Improve handling of %ifid with multi-token parameters
The yasm/nasm preprocessor only checks the first token, which means that
parameters such as `dword [rax]` are treated as identifiers, which is
generally not what we want.
2016-04-20 19:16:22 +02:00
Anton Mitrofanov
42be240ad6 x86inc: Fix AVX emulation of some instructions 2016-04-20 19:16:22 +02:00
Henrik Gramner
8dd3ee9ddd x86inc: Fix AVX emulation of scalar float instructions
Those instructions are not commutative since they only change the first
element in the vector and leave the rest unmodified.
2016-04-20 19:16:22 +02:00
James Almer
70d685a77f x86: use the new helper macros where useful
Reviewed-by: Michael Niedermayer <michael@niedermayer.cc>
Signed-off-by: James Almer <jamrial@gmail.com>
2016-02-14 20:00:21 -03:00
James Almer
73a4589d4b x86: add some more helper macros to check for slow cpuflags
Reviewed-by: Michael Niedermayer <michael@niedermayer.cc>
Signed-off-by: James Almer <jamrial@gmail.com>
2016-02-14 20:00:17 -03:00
James Almer
be22bd32fe x86/cpu: set avxslow cpuflag on btver2 CPUs
They are also slow when using 256 bit wide registers

Reviewed-by: Hendrik Leppkes <h.leppkes@gmail.com>
Signed-off-by: James Almer <jamrial@gmail.com>
2016-02-07 16:39:21 -03:00
James Almer
b3b0ecee15 x86/emms: empty the mmx state unconditionally on supported targets
Reviewed-by: Michael Niedermayer <michael@niedermayer.cc>
Signed-off-by: James Almer <jamrial@gmail.com>
2016-02-04 01:49:01 -03:00
Timothy Gu
44304ae322 all: Add missing header guards 2016-01-28 19:49:48 -08:00
Geza Lore
d39c229e54 x86inc: Add debug symbols indicating sizes of compiled functions
Some debuggers/profilers use this metadata to determine which function a
given instruction is in; without it they get can confused by local labels
(if you haven't stripped those). On the other hand, some tools are still
confused even with this metadata. e.g. this fixes `gdb`, but not `perf`.

Currently only implemented for ELF.
2016-01-21 23:19:46 +01:00
Henrik Gramner
d3662777e0 x86inc: Avoid creating unnecessary local labels
The REP_RET workaround is only needed on old AMD cpus, and the labels clutter
up the symbol table and confuse debugging/profiling tools, so use EQU to
create SHN_ABS symbols instead of creating local labels. Furthermore, skip
the workaround completely in functions that definitely won't run on such cpus.

Note that EQU is just creating a local label when using nasm instead of yasm.
This is probably a bug, but at least it doesn't break anything.
2016-01-21 23:19:46 +01:00
Henrik Gramner
87b587d4fe x86inc: Simplify AUTO_REP_RET
cpuflags is never undefined any more, it's set to 0 instead.

Also fix an incorrect comment.
2016-01-21 23:19:46 +01:00
Henrik Gramner
2d60b18cf0 x86inc: Use more consistent indentation 2016-01-21 23:19:46 +01:00
Henrik Gramner
dfe771dc5a x86inc: Preserve arguments when allocating stack space
When allocating stack space with a larger alignment than the known stack
alignment a temporary register is used for storing the stack pointer.
Ensure that this isn't one of the registers used for passing arguments.
2016-01-21 23:19:46 +01:00
Henrik Gramner
b1496008ee x86inc: Improve FMA instruction handling
* Correctly handle FMA instructions with memory operands.
 * Print a warning if FMA instructions are used without the correct cpuflag.
 * Simplify the instantiation code.
 * Clarify documentation.

Only the last operand in FMA3 instructions can be a memory operand. When
converting FMA4 instructions to FMA3 instructions we can utilize the fact
that multiply is a commutative operation and reorder operands if necessary
to ensure that a memory operand is used only as the last operand.
2016-01-21 23:19:46 +01:00
Henrik Gramner
6cbd0fdf28 x86inc: Be more verbose in assertion failures 2016-01-21 23:19:46 +01:00
James Almer
a2e1b66460 x86/intmath: disable sse av_clip functions when using ICC
It seems to miscompile them

Should fix fate-ra-288 and fate-twinvq

Reviewed-by: Michael Niedermayer <michael@niedermayer.cc>
Signed-off-by: James Almer <jamrial@gmail.com>
2016-01-21 16:50:51 -03:00
James Almer
dee579ffcd x86/fixed_dsp: add ff_butterflies_fixed_sse2
Reviewed-by: Paul B Mahol <onemda@gmail.com>
Signed-off-by: James Almer <jamrial@gmail.com>
2016-01-16 21:09:38 -03:00
Ganesh Ajjanagadde
5989add4ab lavu/x86/lls: add fma3 optimizations for update_lls
This improves accuracy (very slightly) and speed for processors having
fma3.

Sample benchmark (fate flac-16-lpc-cholesky, Haswell):
old:
5993610 decicycles in ff_lpc_calc_coefs,      64 runs,      0 skips
5951528 decicycles in ff_lpc_calc_coefs,     128 runs,      0 skips

new:
5252410 decicycles in ff_lpc_calc_coefs,      64 runs,      0 skips
5232869 decicycles in ff_lpc_calc_coefs,     128 runs,      0 skips

Tested with FATE and --disable-fma3, also examined contents of
lavu/lls-test.

Reviewed-by: James Almer <jamrial@gmail.com>
Reviewed-by: Henrik Gramner <henrik@gramner.com>
Signed-off-by: Ganesh Ajjanagadde <gajjanagadde@gmail.com>
2016-01-15 16:46:13 -05:00
James Almer
36778627e2 x86/intmath: add missing early clobber to output operands
Signed-off-by: James Almer <jamrial@gmail.com>
2016-01-15 13:32:58 -03:00
James Almer
dc79824deb x86/float_dsp: zero extend offset from ff_scalarproduct_float_sse
Reviewed-by: Christophe Gisquet <christophe.gisquet@gmail.com>
Signed-off-by: James Almer <jamrial@gmail.com>
2016-01-08 16:14:32 -03:00
James Almer
4ee38ed7f9 x86/float_dsp: zero extend len from ff_butterflies_float_sse implicitly
Reviewed-by: Christophe Gisquet <christophe.gisquet@gmail.com>
Signed-off-by: James Almer <jamrial@gmail.com>
2016-01-08 16:14:27 -03:00
James Almer
7f520524f6 x86/float_dsp: remove len check from ff_butterflies_float_sse
The function documentation explicitly mentions it needs to be a multiple of 4.

Reviewed-by: Christophe Gisquet <christophe.gisquet@gmail.com>
Signed-off-by: James Almer <jamrial@gmail.com>
2016-01-08 16:14:24 -03:00
James Almer
f4c1a48483 x86/intmath: add sse optimized av_clipf and av_clipd
Reviewed-by: Michael Niedermayer <michael@niedermayer.cc>
Reviewed-by: Ronald S. Bultje <rsbultje@gmail.com>
Signed-off-by: James Almer <jamrial@gmail.com>
2016-01-07 14:24:01 -03:00
Matt Oliver
e9ec28c95e avutil/x86/bswap: Remove warning about bswap intrinsics with msvc.
Signed-off-by: Matt Oliver <protogonoi@gmail.com>
2015-11-23 23:03:32 +11:00
Matt Oliver
58d32c00be avutil/x86/intmath: Fix intrinsic header include when using newer gcc with older icc.
Signed-off-by: Matt Oliver <protogonoi@gmail.com>
2015-11-12 16:54:08 +11:00
Matt Oliver
9b9c9ef3b4 avutil/x86/bswap: Add msvc bswap instrinsics.
This adds msvc optimisations as well as fixing an error in icl whereby it will generate invalid code otherwise.

Signed-off-by: Matt Oliver <protogonoi@gmail.com>
2015-11-12 16:53:44 +11:00
Matt Oliver
9105399060 avutil/x86/intmath: Disable use of tzcnt on older intel compilers.
ICC versions older than atleast 12.1.6 dont have the tzcnt intrinsics.

Reviewed-by: Michael Niedermayer <michael@niedermayer.cc>
Signed-off-by: Matt Oliver <protogonoi@gmail.com>
2015-11-11 10:18:08 +11:00
Matt Oliver
f984174512 avutil/x86/intmath: Correct intrinsic headers for older compilers.
Signed-off-by: Matt Oliver <protogonoi@gmail.com>
2015-11-09 21:40:33 +11:00
Matt Oliver
bff009697d avutil/x86/intmath: Add missing header.
Signed-off-by: Matt Oliver <protogonoi@gmail.com>
2015-11-01 02:11:29 +11:00
Matt Oliver
6c6ac9cb17 avutil/x86/intmath: Use tzcnt in place of bsf.
Signed-off-by: Matt Oliver <protogonoi@gmail.com>
2015-10-31 23:11:32 +11:00
Rodger Combs
1e477a970f lavu: add AESNI CPU flag 2015-10-28 04:23:14 -05:00
Matt Oliver
b0bb1dc62d lavu/intmath.h: Move x86 only msvc/icl functions to x86 specific header.
Signed-off-by: Matt Oliver <protogonoi@gmail.com>
2015-10-19 13:40:51 +11:00
Matt Oliver
216cc1f6fe lavu/intmath.h: Add msvc/icl ctzll optimisations.
Signed-off-by: Matt Oliver <protogonoi@gmail.com>
2015-10-19 13:40:27 +11:00
Henrik Gramner
17710550c4 x86inc: Make cpuflag() and notcpuflag() return 0 or 1
Makes it possible to use them in arithmetic expressions.
2015-10-01 18:14:12 +02:00
James Almer
36e1665d3d avutil/attributes: add AV_GCC_VERSION_AT_MOST
Reviewed-by: Michael Niedermayer <michaelni@gmx.at>
Signed-off-by: James Almer <jamrial@gmail.com>
2015-09-18 12:41:29 -03:00
James Almer
d5f8a642f6 x86: port PSIGNW to cpuflags
Reviewed-by: Ronald S. Bultje <rsbultje@gmail.com>
Signed-off-by: James Almer <jamrial@gmail.com>
2015-09-11 23:27:03 -03:00
Ganesh Ajjanagadde
531b0a316b avutil/x86/asm: rename REG_SP to REG_sp
REG_SP is defined by Solaris system headers.
This fixes a sea of warnings while building on Solaris:
http://fate.ffmpeg.org/report.cgi?time=20150820233505&slot=x86-opensolaris-gcc4.3

Signed-off-by: Ganesh Ajjanagadde <gajjanagadde@gmail.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-08-22 02:56:53 +02:00
Anton Mitrofanov
8db0f71b49 x86inc: warn if XOP integer FMA instruction emulation is impossible
Signed-off-by: Henrik Gramner <henrik@gramner.com>
2015-08-05 16:15:40 +02:00
Henrik Gramner
f0b7882ceb x86inc: Drop SECTION_TEXT macro
The .text section is already 16-byte aligned by default on all supported
platforms so `SECTION_TEXT` isn't any different from `SECTION .text`.
2015-08-04 20:13:09 +02:00
Henrik Gramner
826790f596 x86inc: Support arbitrary stack alignments
Change ALLOC_STACK to always align the stack before allocating stack space for
consistency. Previously alignment would occur either before or after allocating
stack space depending on whether manual alignment was required or not.
2015-08-04 20:13:09 +02:00
James Almer
5750d6c5e9 x86: move XOP emulation code back to x86inc
Only two functions that use xop multiply-accumulate instructions where the
first operand is the same as the fourth actually took advantage of the macros.

This further reduces differences with x264's x86inc.

Reviewed-by: Ronald S. Bultje <rsbultje@gmail.com>
Signed-off-by: James Almer <jamrial@gmail.com>
2015-08-03 17:11:13 -03:00
Henrik Gramner
127203ba5a x86inc: Various minor backports from x264
Reviewed-by: "Ronald S. Bultje" <rsbultje@gmail.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-08-03 04:08:33 +02:00
Henrik Gramner
f151fbd9e5 x86inc: Disable vpbroadcastq workaround in newer yasm versions
The bug was fixed in 1.3.0, so only perform the workaround in earlier versions.

Reviewed-by: "Ronald S. Bultje" <rsbultje@gmail.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2015-08-03 03:13:20 +02:00
James Almer
4d2c014a8f x86/float_dsp: add missing colon to labels
Silences warnings with Nasm

Signed-off-by: James Almer <jamrial@gmail.com>
2015-07-26 02:51:08 -03:00
James Almer
bd48764532 avutil/x86/bswap: force inline asm versions with ICC
Recent ICC versions that define GCC as >= 4.5 (like ICC 13) apparently can't
optimize the generic C versions of av_bswap*() on their own.

Reviewed-by: Michael Niedermayer <michaelni@gmx.at>
Signed-off-by: James Almer <jamrial@gmail.com>
2015-07-18 20:48:09 -03:00
Michael Niedermayer
2ecbf44f21 Merge commit 'd1a6cb195f610978ba5d2351e60f938f7f261d59'
* commit 'd1a6cb195f610978ba5d2351e60f938f7f261d59':
  x86: Serialize rdtsc in read_time()

Merged-by: Michael Niedermayer <michaelni@gmx.at>
2015-07-09 12:28:09 +02:00
Henrik Gramner
d1a6cb195f x86: Serialize rdtsc in read_time()
Improves the accuracy of measurements, especially in short sections.

To quote the Intel 64 and IA-32 Architectures Software Developer's Manual:
"The RDTSC instruction is not a serializing instruction. It does not necessarily
wait until all previous instructions have been executed before reading the counter.
Similarly, subsequent instructions may begin execution before the read operation
is performed. If software requires RDTSC to be executed only after all previous
instructions have completed locally, it can either use RDTSCP (if the processor
supports that instruction) or execute the sequence LFENCE;RDTSC."

SSE2 is a requirement for lfence so only use it on SSE2-capable systems.
Prefer lfence;rdtsc over rdtscp since rdtscp is supported on fewer systems.

Signed-off-by: Luca Barbato <lu_zero@gentoo.org>
2015-07-09 00:10:13 +02:00
James Almer
93e7b7fb34 avutil/x86/intmath: add missing check for inline assembly
Signed-off-by: James Almer <jamrial@gmail.com>
2015-06-27 14:33:53 -03:00
James Almer
1e51e517be avutil/x86/intmath: use bzhi gcc builtin in av_mod_uintp2()
Signed-off-by: James Almer <jamrial@gmail.com>
2015-06-27 12:56:55 -03:00