1
0
mirror of https://github.com/FFmpeg/FFmpeg.git synced 2024-12-02 03:06:28 +02:00
Commit Graph

6271 Commits

Author SHA1 Message Date
Haihao Xiang
a4630d479a lavu/hwcontext_vulkan: Support write on drm frame
Otherwise nothing is written into the destination when a write mapping
is requested.

For example, a vulkan frame mapped from a drm frame (which is wrapped as
a vaapi frame in the example) is used as the output of scale_vulkan
filter, it always gets a green screen without this patch.

ffmpeg -init_hw_device vaapi=va -init_hw_device vulkan=vulkan@va
-filter_hw_device vulkan -f lavfi -i testsrc=size=352x288,format=nv12
-vf
"hwupload,scale_vulkan,hwmap=derive_device=vaapi:reverse=1,format=vaapi,hwdownload,format=nv12"
-f nut - | ffplay -

Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
2024-06-12 01:53:18 +02:00
Rémi Denis-Courmont
f6d0a41c8c lavu/riscv: use Zbb CLZ/CTZ/CLZW/CTZW at run-time
Zbb static    Zbb dynamic   I baseline
clz       0.668032642   1.336072283   19.552376803
clzl      0.668092643   1.336181786   26.110855571
ctz       1.336208533   3.340209702   26.054869008
ctzl      1.336247784   3.340362457   26.055266290
(seconds for 1 billion iterations on a SiFive-U74 core)
2024-06-11 20:12:37 +03:00
Rémi Denis-Courmont
98db140910 lavu/riscv: use Zbb CPOP/CPOPW at run-time
Zbb static    Zbb dynamic   I baseline
popcount  1.336129286   3.469067758   20.146362909
popcountl 1.336322291   3.340292968   20.224829821
(seconds for 1 billion iterations on a SiFive-U74 core)
2024-06-11 20:12:37 +03:00
Rémi Denis-Courmont
324899b748 lavu/riscv: use Zbb REV8 at run-time
This adds runtime support to use Zbb REV8 for 32- and 64-bit byte-wise
swaps. The result is about five times slower than if targetting Zbb
statically, but still a lot faster than the default bespoke C code or a
call to GCC run-time functions.

For 16-bit swap, this is however unsurprisingly a lot worse, and so this
sticks to the baseline. In fact, even using REV8 statically does not
seem to be beneficial in that case.

         Zbb static    Zbb dynamic   I baseline
bswap16:  0.668184765   3.340764069   0.668029012
bswap32:  0.668174014   3.340763319   9.353855435
bswap64:  0.668221765   3.340496313  14.698672283
(seconds for 1 billion iterations on a SiFive-U74 core)
2024-06-11 20:12:37 +03:00
Rémi Denis-Courmont
378d1b06c3 riscv: probe for Zbb extension at load time
Due to hysterical raisins, most RISC-V Linux distributions target a
RV64GC baseline excluding the Bit-manipulation ISA extensions, most
notably:
- Zba: address generation extension and
- Zbb: basic bit manipulation extension.
Most CPUs that would make sense to run FFmpeg on support Zba and Zbb
(including the current FATE runner), so it makes sense to optimise for
them. In fact a large chunk of existing assembler optimisations relies
on Zba and/or Zbb.

Since we cannot patch shared library code, the next best thing is to
carry a flag initialised at load-time and check it on need basis.
This results in 3 instructions overhead on isolated use, e.g.:
1:  AUIPC rd, %pcrel_hi(ff_rv_zbb_supported)
    LBU   rd, %pcrel_lo(1b)(rd)
    BEQZ  rd, non_Zbb_fallback_code
    // Zbb code here

The C compiler will typically load the flag ahead of time to reducing
latency, and can also keep it around if Zbb is used multiple times in a
single optimisation scope. For this to work, the flag symbol must be
hidden; otherwise the optimisation degrades with a GOT look-up to
support interposition:
1:  AUIPC rd, GOT_OFFSET_HI
    LD    rd, GOT_OFFSET_LO(rd)
    LBU   rd, (rd)
    BEQZ  rd, non_Zbb_fallback_code
    // Zbb code here

This patch adds code to provision the flag in libraries using bit
manipulation functions from libavutil: byte-swap, bit-weight and
counting leading or trailing zeroes.
2024-06-11 20:12:37 +03:00
Zhao Zhili
33e4cc963d avutil/timer: Add clock_gettime as a fallback of AV_READ_TIME
Reviewed-by: Rémi Denis-Courmont <remi@remlab.net>
Reviewed-by: Martin Storsjö <martin@martin.st>
Signed-off-by: Zhao Zhili <zhilizhao@tencent.com>
2024-06-11 01:11:36 +08:00
Zhao Zhili
6a18c0bc87 avutil/aarch64: Skip define AV_READ_TIME for apple
It will fallback to mach_absolute_time inside libavutil/timer.h

Reviewed-by: Martin Storsjö <martin@martin.st>
Signed-off-by: Zhao Zhili <zhilizhao@tencent.com>
2024-06-11 01:10:42 +08:00
James Almer
a14440867c x86/float_dsp: add SSE2 and AVX versions of scalarproduct_double
Signed-off-by: James Almer <jamrial@gmail.com>
2024-06-03 22:14:55 -03:00
Lynne
63e166d802
lavu: bump minor and add APIchanges entries for the new channel positions 2024-06-02 19:19:25 +02:00
Lynne
caeb275092
channel_layout: add new channel positions supported by xHE-AAC
apichanges will be updated upon merging, as well as a version bump.
2024-06-02 18:34:38 +02:00
Rémi Denis-Courmont
eed0a1d3d4 lavu/lls: R-V V update_lls
update_lls_8_c:        7.5
update_lls_8_rvv_f64:  4.2
update_lls_12_c:      14.5
update_lls_12_rvv_f64: 5.7
2024-06-01 18:05:58 +03:00
James Almer
7087da303f avutil/float_dsp.h: fix doxy for scalarproduct_double
Signed-off-by: James Almer <jamrial@gmail.com>
2024-06-01 11:15:30 -03:00
James Almer
7736ca1d7b avutil/float_dsp: revert accidental doxy removal
done by accident in 6a7c4d60a1.

Signed-off-by: James Almer <jamrial@gmail.com>
2024-06-01 11:14:42 -03:00
Rémi Denis-Courmont
9238f6cb41 lavu/float_dsp: R-V V scalarproduct_double
C908:
scalarproduct_double_c:       39.2
scalarproduct_double_rvv_f64: 10.5

X60:
scalarproduct_double_c:       35.0
scalarproduct_double_rvv_f64:  5.2
2024-05-31 22:22:43 +03:00
Rémi Denis-Courmont
73c278d270 lavu/lls: use ff_scalarproduct_double_c() 2024-05-31 22:22:43 +03:00
Rémi Denis-Courmont
6a7c4d60a1 lavu/float_dsp: add double-precision scalar product
The function pointer is appended to the structure for backward binary
compatibility. Fortunately, this is allocated by libavutil, not by the
user, so increasing the structure size is safe.
2024-05-31 22:22:43 +03:00
Rémi Denis-Courmont
4fe8f2cc43 riscv: allow passing addend to vtype_vli macro
A constant (-1) is added to the length value, so we can have an added
for free, and optimise the addition away if the addend is exactly 1.
2024-05-30 18:30:52 +03:00
Michael Niedermayer
e3481730ed
avutil/tests/opt: Check av_set_options_string() for failure
This is test code after all so it should test things

Fixes: CID1518990 Unchecked return value

Sponsored-by: Sovereign Tech Fund
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2024-05-28 03:48:05 +02:00
Michael Niedermayer
e8a1e1899d
avutil/tests/dict: Check av_dict_set() before get for failure
Failure is possible due to strdup()

Fixes: CID1516764 Dereference null return value

Sponsored-by: Sovereign Tech Fund
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2024-05-28 03:48:05 +02:00
Michael Niedermayer
87846f64b5
avutil/random_seed: Avoid dead returns
Fixes: CID1538296 Structurally dead code

Sponsored-by: Sovereign Tech Fund
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2024-05-28 03:48:05 +02:00
Michael Niedermayer
c841cb45e8
qsv: Initialize impl_value
Fixes: The warnings from CID1598553 Uninitialized scalar variable

Passing partly initialized structs is ugly and asking for hard to rieproduce bugs,
The uninitialized fields where not used

Reviewed-by: "Xiang, Haihao" <haihao.xiang-at-intel.com@ffmpeg.org>
Sponsored-by: Sovereign Tech Fund
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2024-05-28 03:48:04 +02:00
James Almer
8c97449482 avutil/channel_layout: add a helper function to get the ambisonic order of a layout
Signed-off-by: James Almer <jamrial@gmail.com>
2024-05-23 12:07:19 -03:00
oltolm
45d31614bc avutil/hwcontext_qsv: fix GCC 14.1 warnings
Tested-by: Tong Wu <tong1.wu@intel.com>
Signed-off-by: oltolm <oleg.tolmatcev@gmail.com>
2024-05-21 16:57:46 +08:00
Haihao Xiang
d3cc5ead42 lavu/hwcontext_qsv: add support for dynamic frame pool in qsv_map_to
Make it work with the source which has a dynamic frame pool.

Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
2024-05-20 09:30:49 +08:00
Haihao Xiang
932f78c4e5 lavu/hwcontext_qsv: add support for dynamic frame pool in qsv_frames_derive_to
Make it work with the source which has a dynamic frame pool.

Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
2024-05-20 09:30:49 +08:00
Haihao Xiang
96db4a62e0 lavu/hwcontext_qsv: create dynamic frame pool if required
When AVHWFramesContext.initial_pool_size is 0, a dynamic frame pool is
required. We may support this under certain conditions, e.g. oneVPL 2.9+
support dynamic frame allocation, we needn't provide a fixed frame pool
in the mfxFrameAllocator.Alloc callback.

Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
2024-05-20 09:30:49 +08:00
Haihao Xiang
4c0bb7d4a9 lavu/hwcontext_qsv: update AVQSVFramesContext to support dynamic frame pool
Add AVQSVFramesContext.info and update the description.

Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
2024-05-20 09:30:48 +08:00
Haihao Xiang
3178c99fa9 lavu/version: fix minor version
The latest version should be 59.18.100 since commit 01c5f4ad

$ git diff 01c5f4ad~1..HEAD doc/APIchanges
...
+2024-05-10 - xxxxxxxxx - lavu 59.18.100 - cpu.h
+  Add AV_CPU_FLAG_RV_ZVBB.
+

Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
2024-05-20 09:24:44 +08:00
Rémi Denis-Courmont
ee1526c05f lavu/riscv: add assembler macros for adjusting vector LMUL
vtype_vli computes the VTYPE value with the optimal LMUL for a given
element width, tail and mask policies and a run-time vector length.

vtype_ivli does the same, but with the compile-time constant vector
length.

vwtypei and vntypei can be used to widen or narrow a VTYPE value for
use in mixed-width vector-optimised functions.
2024-05-19 18:37:33 +03:00
Brad Smith
115c96b9bd avutil/ppc/cpu: Also use the machdep.altivec sysctl on NetBSD
Use the machdep.altivec sysctl on NetBSD for AltiVec detection
as is done with OpenBSD.

Signed-off-by: Brad Smith <brad@comstyle.com>
2024-05-18 07:38:40 -04:00
Rémi Denis-Courmont
83e5fdd3f4 lavu/riscv: fix parsing the unaligned access capability
Pointed-out-by: Stefan O'Rear <sorear@fastmail.com>
2024-05-15 20:04:08 +03:00
Rémi Denis-Courmont
20fbc07af1 lavu/riscv: remove bogus B extension
The B Bit manipulation extension was not defined to this day, and
probably never will. Instead it was broken down into Zba, Zbb, Zbc and
Zbs with no particular blessed set to make up B.

This removes the bogus field test. Linux never set this bit, nor
(AFAICT) did FreeBSD or any other OS. We can always add it back in the
unlikely event that it gets taken into use.
2024-05-14 19:50:00 +03:00
Rémi Denis-Courmont
b410439263 lavu/riscv: CPU flag for fast misaligned accesses 2024-05-14 19:50:00 +03:00
Rémi Denis-Courmont
61ec7450ff lavu/riscv: fallback to raw hwprobe() system call
Not all C run-times support this, and even then, it will be a while
before distributions provide recent enough versions thereof.

Since this is a trivial system call wrapper, we might just as well call
the corresponding kernel system call directly where the C run-time lacks
support but the kernel headers are new enough (as is the case on Debian
Unstable at the time of writing). In doing so, we need to add a few more
guards as the first suitable kernel (headers) release did not expose the
V, Zba and Zbb extensions.
2024-05-14 19:50:00 +03:00
Rémi Denis-Courmont
247c5b2b97 lavu/riscv: add ff_rv_vlen_least()
This inline function checks that the vector length is at least a given
value. With this, most run-time VLEN checks can be optimised away.
2024-05-13 18:36:07 +03:00
Michael Niedermayer
c304784a86
avutil/tests/base64: Check with too short output array
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2024-05-13 03:26:57 +02:00
Michael Niedermayer
2d216566f2
libavutil/base64: Try not to write over the array end
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
2024-05-13 03:26:57 +02:00
Rémi Denis-Courmont
5d8f62feb5 lavu/riscv: add Zvbb CPU capability detection
This requires Linux kernel version 6.8 or later.
2024-05-11 11:38:49 +03:00
Rémi Denis-Courmont
01c5f4ad9f riscv: add Zvbb vector bit manipulation extension 2024-05-11 11:38:49 +03:00
Rémi Denis-Courmont
5afe734b6d lavu/riscv: remove bespoke assembler for MIN
This is no longer necessary as Zbb is now always explicitly required.
2024-05-10 18:59:06 +03:00
Rémi Denis-Courmont
89029baebd lavu/riscv: allow requesting a second extension 2024-05-10 18:59:06 +03:00
Rémi Denis-Courmont
1f150a68ac lavu/riscv: fix build without <sys/hwprobe.h> 2024-05-08 18:26:32 +03:00
James Almer
4e069ba80a avutil/opt: free the temporary layout in av_opt_is_set_to_default()
Signed-off-by: James Almer <jamrial@gmail.com>
2024-05-07 20:11:42 -03:00
James Almer
ae0293ee41 avutil/opt: propagate av_dict_copy() errors in av_opt_{get,set}_dict_val()
Signed-off-by: James Almer <jamrial@gmail.com>
2024-05-07 20:11:42 -03:00
James Almer
9614efc258 avutil/opt: don't set a channel layout if the option is flagged as read only
Signed-off-by: James Almer <jamrial@gmail.com>
2024-05-07 20:11:42 -03:00
James Almer
2987c65caa avutil/opt: add a note about the av_opt_{get,set}_chlayout() behavior
Based on the one for av_opt_set_dict_val().

Signed-off-by: James Almer <jamrial@gmail.com>
2024-05-07 20:11:42 -03:00
Rémi Denis-Courmont
95d1052fba lavu/riscv: add hwprobe() for CPU detection
This adds the Linux-specific function call to detect CPU features. Unlike
the more portable auxillary vector, this supports extensions other than
single lettered ones. At this point, FFmpeg already needs this to detect
Zba and Zbb at run-time, and probably will need it for Zvbb in the near
future.

Support will be available in glibc 2.40 onward.
2024-05-06 22:09:41 +03:00
Rémi Denis-Courmont
d7333ba6f2 lavu/riscv: indent code
This reindents code to prepare for the next changeset.
No functional changes.
2024-05-06 22:09:41 +03:00
James Almer
088bf6e8c1 avutil/iamf: use AV_OPT_TYPE_UINT
Signed-off-by: James Almer <jamrial@gmail.com>
2024-05-04 21:31:33 -03:00
James Almer
d6e877bbcd avutil/iamf: fix offsets for mix_gain options
Signed-off-by: James Almer <jamrial@gmail.com>
2024-05-04 21:20:35 -03:00