This is a preparation patch to submit optimized code for MSA (MIPS-SIMD-Architecture)
Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
Reviewed-by: Nedeljko Babic <Nedeljko.Babic@imgtec.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
Imagination Technologies has come up with MIPS Warrior Processor Cores.
More details can be found at-
http://www.imgtec.com/mips/warrior/pclass.asphttp://www.imgtec.com/mips/warrior/iclass.asp
This is a preparation patch to submit optimized code for MSA (MIPS-SIMD-Architecture)
This patch set is adding support for P5600 and I6400 CPUs.
MIPS 'generic' case is added, with mips32r2 arch as default (fpu and dsp opt enabled).
Sample configurations for new MSA architectures-
$ ./configure --enable-cross-compile --cross-prefix=<PATH> --arch=mips --target-os=linux --cpu=p5600
$ ./configure --enable-cross-compile --cross-prefix=<PATH> --arch=mips --target-os=linux --cpu=i6400
Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
Reviewed-by: Nedeljko Babic <Nedeljko.Babic@imgtec.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* commit '4978850ca2cb1ec6908f5bc79cc592ca454d11e8':
build: Split JPEG-related tables off into a separate component
Conflicts:
configure
Merged-by: Michael Niedermayer <michaelni@gmx.at>
* commit 'd0a63d8b989647ffdb5f40da8e1feaffe1a8e791':
qsvdec: split off some code that will be shared with the encoder
Conflicts:
libavcodec/Makefile
libavcodec/qsvdec.h
Merged-by: Michael Niedermayer <michaelni@gmx.at>
unsigned overflows are well defined in C and used for example in crypto
and various other places.
None of the affected warnings currently shown points to an actual defect
untested
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
Real world MMX code does not put EMMS at the start and end of every function,
it would be incredibly inefficient to do that
thus do not warn about that
Tested-by: Carl Eugen Hoyos <cehoyos@ag.or.at>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* commit '9c8074050745184a61059ad56045ad711299e33d':
configure: Mark qsv subsystem as not selectable on the command line
Merged-by: Michael Niedermayer <michaelni@gmx.at>
* commit 'b77e335e441040a40fc6156b8e4a134745d10233':
configure: Move the .object_arch check to the right place
Merged-by: Michael Niedermayer <michaelni@gmx.at>
* commit 'dcae2e32f7d8a1ca5fb8c1e4aa81313be854dd73':
arm: Suppress tags about used cpu arch and extensions
Merged-by: Michael Niedermayer <michaelni@gmx.at>
When all the codepaths using manually set .arch/.fpu code is
behind runtime detection, the elf attributes should be suppressed.
This allows tools to know that the final built binary doesn't
strictly require these extensions.
Signed-off-by: Martin Storsjö <martin@martin.st>
There are no independant uses of mips32r2 instructions except for the
FPU parts. Due to the heavy use of mips32r2 specifc fpu extensions, I
am guessing the original author intended MIPSFPU to imply MIPS32R2 anyway.
Since these fpu instructions are available on mips64 (non-r2), enable them
there as well.
Also remove the last occurence of HAVE_MIPS32R2 (which is coupled to
HAVE_MIPSFPU anyway).
mips32r2 is left in the list of options form compatability so that using
--disable-mips32r2 doesn't break anything.
Signed-off-by: James Cowgill <james410@cowgill.org.uk>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
