mirror of
https://github.com/FFmpeg/FFmpeg.git
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7e22514d98
* qatar/master:
float_dsp: ppc: add a separate header for Altivec function prototypes
ARM: fix float_dsp breakage from d5a7229
Add a float DSP framework to libavutil
PPC: Move types_altivec.h and util_altivec.h from libavcodec to libavutil
ARM: Move asm.S from libavcodec to libavutil
vc1dsp: mark put/avg_vc1_mspel_mc() always_inline
Merged-by: Michael Niedermayer <michaelni@gmx.at>
435 lines
13 KiB
ArmAsm
435 lines
13 KiB
ArmAsm
/*
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* Simple IDCT
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*
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* Copyright (c) 2001 Michael Niedermayer <michaelni@gmx.at>
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* Copyright (c) 2007 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/arm/asm.S"
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#define W1 22725 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W2 21407 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W3 19266 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W4 16383 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W5 12873 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W6 8867 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define W7 4520 /* cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5 */
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#define ROW_SHIFT 11
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#define COL_SHIFT 20
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#define W13 (W1 | (W3 << 16))
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#define W26 (W2 | (W6 << 16))
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#define W42 (W4 | (W2 << 16))
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#define W42n (-W4&0xffff | (-W2 << 16))
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#define W46 (W4 | (W6 << 16))
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#define W57 (W5 | (W7 << 16))
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.text
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.align
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w13: .long W13
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w26: .long W26
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w42: .long W42
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w42n: .long W42n
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w46: .long W46
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w57: .long W57
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/*
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Compute partial IDCT of single row.
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shift = left-shift amount
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r0 = source address
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r2 = row[2,0] <= 2 cycles
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r3 = row[3,1]
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ip = w42 <= 2 cycles
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Output in registers r4--r11
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*/
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.macro idct_row shift
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ldr lr, w46 /* lr = W4 | (W6 << 16) */
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mov r1, #(1<<(\shift-1))
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smlad r4, r2, ip, r1
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smlsd r7, r2, ip, r1
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ldr ip, w13 /* ip = W1 | (W3 << 16) */
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ldr r10,w57 /* r10 = W5 | (W7 << 16) */
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smlad r5, r2, lr, r1
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smlsd r6, r2, lr, r1
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smuad r8, r3, ip /* r8 = B0 = W1*row[1] + W3*row[3] */
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smusdx r11,r3, r10 /* r11 = B3 = W7*row[1] - W5*row[3] */
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ldr lr, [r0, #12] /* lr = row[7,5] */
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pkhtb r2, ip, r10,asr #16 /* r3 = W7 | (W3 << 16) */
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pkhbt r1, ip, r10,lsl #16 /* r1 = W1 | (W5 << 16) */
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smusdx r9, r2, r3 /* r9 = -B1 = W7*row[3] - W3*row[1] */
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smlad r8, lr, r10,r8 /* B0 += W5*row[5] + W7*row[7] */
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smusdx r10,r3, r1 /* r10 = B2 = W5*row[1] - W1*row[3] */
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ldr r3, w42n /* r3 = -W4 | (-W2 << 16) */
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smlad r10,lr, r2, r10 /* B2 += W7*row[5] + W3*row[7] */
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ldr r2, [r0, #4] /* r2 = row[6,4] */
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smlsdx r11,lr, ip, r11 /* B3 += W3*row[5] - W1*row[7] */
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ldr ip, w46 /* ip = W4 | (W6 << 16) */
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smlad r9, lr, r1, r9 /* B1 -= W1*row[5] + W5*row[7] */
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smlad r5, r2, r3, r5 /* A1 += -W4*row[4] - W2*row[6] */
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smlsd r6, r2, r3, r6 /* A2 += -W4*row[4] + W2*row[6] */
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smlad r4, r2, ip, r4 /* A0 += W4*row[4] + W6*row[6] */
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smlsd r7, r2, ip, r7 /* A3 += W4*row[4] - W6*row[6] */
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.endm
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/*
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Compute partial IDCT of half row.
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shift = left-shift amount
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r2 = row[2,0]
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r3 = row[3,1]
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ip = w42
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Output in registers r4--r11
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*/
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.macro idct_row4 shift
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ldr lr, w46 /* lr = W4 | (W6 << 16) */
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ldr r10,w57 /* r10 = W5 | (W7 << 16) */
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mov r1, #(1<<(\shift-1))
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smlad r4, r2, ip, r1
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smlsd r7, r2, ip, r1
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ldr ip, w13 /* ip = W1 | (W3 << 16) */
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smlad r5, r2, lr, r1
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smlsd r6, r2, lr, r1
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smusdx r11,r3, r10 /* r11 = B3 = W7*row[1] - W5*row[3] */
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smuad r8, r3, ip /* r8 = B0 = W1*row[1] + W3*row[3] */
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pkhtb r2, ip, r10,asr #16 /* r3 = W7 | (W3 << 16) */
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pkhbt r1, ip, r10,lsl #16 /* r1 = W1 | (W5 << 16) */
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smusdx r9, r2, r3 /* r9 = -B1 = W7*row[3] - W3*row[1] */
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smusdx r10,r3, r1 /* r10 = B2 = W5*row[1] - W1*row[3] */
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.endm
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/*
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Compute final part of IDCT single row without shift.
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Input in registers r4--r11
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Output in registers ip, r4--r6, lr, r8--r10
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*/
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.macro idct_finish
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add ip, r4, r8 /* r1 = A0 + B0 */
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sub lr, r4, r8 /* r2 = A0 - B0 */
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sub r4, r5, r9 /* r2 = A1 + B1 */
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add r8, r5, r9 /* r2 = A1 - B1 */
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add r5, r6, r10 /* r1 = A2 + B2 */
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sub r9, r6, r10 /* r1 = A2 - B2 */
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add r6, r7, r11 /* r2 = A3 + B3 */
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sub r10,r7, r11 /* r2 = A3 - B3 */
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.endm
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/*
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Compute final part of IDCT single row.
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shift = right-shift amount
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Input/output in registers r4--r11
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*/
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.macro idct_finish_shift shift
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add r3, r4, r8 /* r3 = A0 + B0 */
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sub r2, r4, r8 /* r2 = A0 - B0 */
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mov r4, r3, asr #\shift
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mov r8, r2, asr #\shift
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sub r3, r5, r9 /* r3 = A1 + B1 */
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add r2, r5, r9 /* r2 = A1 - B1 */
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mov r5, r3, asr #\shift
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mov r9, r2, asr #\shift
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add r3, r6, r10 /* r3 = A2 + B2 */
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sub r2, r6, r10 /* r2 = A2 - B2 */
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mov r6, r3, asr #\shift
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mov r10,r2, asr #\shift
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add r3, r7, r11 /* r3 = A3 + B3 */
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sub r2, r7, r11 /* r2 = A3 - B3 */
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mov r7, r3, asr #\shift
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mov r11,r2, asr #\shift
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.endm
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/*
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Compute final part of IDCT single row, saturating results at 8 bits.
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shift = right-shift amount
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Input/output in registers r4--r11
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*/
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.macro idct_finish_shift_sat shift
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add r3, r4, r8 /* r3 = A0 + B0 */
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sub ip, r4, r8 /* ip = A0 - B0 */
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usat r4, #8, r3, asr #\shift
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usat r8, #8, ip, asr #\shift
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sub r3, r5, r9 /* r3 = A1 + B1 */
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add ip, r5, r9 /* ip = A1 - B1 */
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usat r5, #8, r3, asr #\shift
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usat r9, #8, ip, asr #\shift
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add r3, r6, r10 /* r3 = A2 + B2 */
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sub ip, r6, r10 /* ip = A2 - B2 */
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usat r6, #8, r3, asr #\shift
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usat r10,#8, ip, asr #\shift
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add r3, r7, r11 /* r3 = A3 + B3 */
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sub ip, r7, r11 /* ip = A3 - B3 */
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usat r7, #8, r3, asr #\shift
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usat r11,#8, ip, asr #\shift
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.endm
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/*
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Compute IDCT of single row, storing as column.
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r0 = source
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r1 = dest
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*/
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function idct_row_armv6
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push {lr}
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ldr lr, [r0, #12] /* lr = row[7,5] */
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ldr ip, [r0, #4] /* ip = row[6,4] */
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ldr r3, [r0, #8] /* r3 = row[3,1] */
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ldr r2, [r0] /* r2 = row[2,0] */
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orrs lr, lr, ip
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itt eq
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cmpeq lr, r3
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cmpeq lr, r2, lsr #16
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beq 1f
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push {r1}
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ldr ip, w42 /* ip = W4 | (W2 << 16) */
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cmp lr, #0
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beq 2f
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idct_row ROW_SHIFT
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b 3f
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2: idct_row4 ROW_SHIFT
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3: pop {r1}
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idct_finish_shift ROW_SHIFT
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strh r4, [r1]
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strh r5, [r1, #(16*2)]
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strh r6, [r1, #(16*4)]
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strh r7, [r1, #(16*6)]
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strh r11,[r1, #(16*1)]
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strh r10,[r1, #(16*3)]
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strh r9, [r1, #(16*5)]
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strh r8, [r1, #(16*7)]
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pop {pc}
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1: mov r2, r2, lsl #3
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strh r2, [r1]
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strh r2, [r1, #(16*2)]
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strh r2, [r1, #(16*4)]
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strh r2, [r1, #(16*6)]
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strh r2, [r1, #(16*1)]
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strh r2, [r1, #(16*3)]
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strh r2, [r1, #(16*5)]
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strh r2, [r1, #(16*7)]
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pop {pc}
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endfunc
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/*
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Compute IDCT of single column, read as row.
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r0 = source
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r1 = dest
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*/
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function idct_col_armv6
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push {r1, lr}
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ldr r2, [r0] /* r2 = row[2,0] */
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ldr ip, w42 /* ip = W4 | (W2 << 16) */
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ldr r3, [r0, #8] /* r3 = row[3,1] */
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idct_row COL_SHIFT
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pop {r1}
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idct_finish_shift COL_SHIFT
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strh r4, [r1]
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strh r5, [r1, #(16*1)]
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strh r6, [r1, #(16*2)]
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strh r7, [r1, #(16*3)]
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strh r11,[r1, #(16*4)]
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strh r10,[r1, #(16*5)]
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strh r9, [r1, #(16*6)]
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strh r8, [r1, #(16*7)]
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pop {pc}
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endfunc
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/*
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Compute IDCT of single column, read as row, store saturated 8-bit.
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r0 = source
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r1 = dest
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r2 = line size
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*/
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function idct_col_put_armv6
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push {r1, r2, lr}
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ldr r2, [r0] /* r2 = row[2,0] */
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ldr ip, w42 /* ip = W4 | (W2 << 16) */
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ldr r3, [r0, #8] /* r3 = row[3,1] */
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idct_row COL_SHIFT
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pop {r1, r2}
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idct_finish_shift_sat COL_SHIFT
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strb_post r4, r1, r2
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strb_post r5, r1, r2
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strb_post r6, r1, r2
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strb_post r7, r1, r2
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strb_post r11,r1, r2
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strb_post r10,r1, r2
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strb_post r9, r1, r2
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strb_post r8, r1, r2
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sub r1, r1, r2, lsl #3
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pop {pc}
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endfunc
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/*
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Compute IDCT of single column, read as row, add/store saturated 8-bit.
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r0 = source
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r1 = dest
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r2 = line size
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*/
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function idct_col_add_armv6
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push {r1, r2, lr}
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ldr r2, [r0] /* r2 = row[2,0] */
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ldr ip, w42 /* ip = W4 | (W2 << 16) */
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ldr r3, [r0, #8] /* r3 = row[3,1] */
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idct_row COL_SHIFT
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pop {r1, r2}
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idct_finish
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ldrb r3, [r1]
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ldrb r7, [r1, r2]
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ldrb r11,[r1, r2, lsl #2]
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add ip, r3, ip, asr #COL_SHIFT
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usat ip, #8, ip
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add r4, r7, r4, asr #COL_SHIFT
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strb_post ip, r1, r2
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ldrb ip, [r1, r2]
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usat r4, #8, r4
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ldrb r11,[r1, r2, lsl #2]
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add r5, ip, r5, asr #COL_SHIFT
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usat r5, #8, r5
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strb_post r4, r1, r2
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ldrb r3, [r1, r2]
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ldrb ip, [r1, r2, lsl #2]
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strb_post r5, r1, r2
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ldrb r7, [r1, r2]
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ldrb r4, [r1, r2, lsl #2]
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add r6, r3, r6, asr #COL_SHIFT
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usat r6, #8, r6
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add r10,r7, r10,asr #COL_SHIFT
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usat r10,#8, r10
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add r9, r11,r9, asr #COL_SHIFT
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usat r9, #8, r9
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add r8, ip, r8, asr #COL_SHIFT
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usat r8, #8, r8
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add lr, r4, lr, asr #COL_SHIFT
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usat lr, #8, lr
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strb_post r6, r1, r2
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strb_post r10,r1, r2
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strb_post r9, r1, r2
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strb_post r8, r1, r2
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strb_post lr, r1, r2
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sub r1, r1, r2, lsl #3
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pop {pc}
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endfunc
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/*
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Compute 8 IDCT row transforms.
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func = IDCT row->col function
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width = width of columns in bytes
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*/
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.macro idct_rows func width
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bl \func
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add r0, r0, #(16*2)
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add r1, r1, #\width
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bl \func
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add r0, r0, #(16*2)
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add r1, r1, #\width
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bl \func
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add r0, r0, #(16*2)
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add r1, r1, #\width
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bl \func
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sub r0, r0, #(16*5)
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add r1, r1, #\width
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bl \func
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add r0, r0, #(16*2)
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add r1, r1, #\width
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bl \func
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add r0, r0, #(16*2)
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add r1, r1, #\width
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bl \func
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add r0, r0, #(16*2)
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add r1, r1, #\width
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bl \func
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sub r0, r0, #(16*7)
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.endm
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/* void ff_simple_idct_armv6(DCTELEM *data); */
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function ff_simple_idct_armv6, export=1
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push {r4-r11, lr}
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sub sp, sp, #128
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mov r1, sp
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idct_rows idct_row_armv6, 2
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mov r1, r0
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mov r0, sp
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idct_rows idct_col_armv6, 2
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add sp, sp, #128
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pop {r4-r11, pc}
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endfunc
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/* ff_simple_idct_add_armv6(uint8_t *dest, int line_size, DCTELEM *data); */
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function ff_simple_idct_add_armv6, export=1
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push {r0, r1, r4-r11, lr}
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sub sp, sp, #128
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mov r0, r2
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mov r1, sp
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idct_rows idct_row_armv6, 2
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mov r0, sp
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ldr r1, [sp, #128]
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ldr r2, [sp, #(128+4)]
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idct_rows idct_col_add_armv6, 1
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add sp, sp, #(128+8)
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pop {r4-r11, pc}
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endfunc
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/* ff_simple_idct_put_armv6(uint8_t *dest, int line_size, DCTELEM *data); */
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function ff_simple_idct_put_armv6, export=1
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push {r0, r1, r4-r11, lr}
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sub sp, sp, #128
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mov r0, r2
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mov r1, sp
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idct_rows idct_row_armv6, 2
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mov r0, sp
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ldr r1, [sp, #128]
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ldr r2, [sp, #(128+4)]
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idct_rows idct_col_put_armv6, 1
|
|
|
|
add sp, sp, #(128+8)
|
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pop {r4-r11, pc}
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endfunc
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