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bbe95f7353
From x86inc: > On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either > a branch or a branch target. So switch to a 2-byte form of ret in that case. > We can automatically detect "follows a branch", but not a branch target. > (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.) x86inc can automatically determine whether to use REP_RET rather than REP in most of these cases, so impact is minimal. Additionally, a few REP_RETs were used unnecessary, despite the return being nowhere near a branch. The only CPUs affected were AMD K10s, made between 2007 and 2011, 16 years ago and 12 years ago, respectively. In the future, everyone involved with x86inc should consider dropping REP_RETs altogether.
188 lines
5.7 KiB
NASM
188 lines
5.7 KiB
NASM
;******************************************************************************
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;* V210 SIMD unpack
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;* Copyright (c) 2011 Loren Merritt <lorenm@u.washington.edu>
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;* Copyright (c) 2011 Kieran Kunhya <kieran@kunhya.com>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA 64
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perm_y:
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db 0,1, 4,5, 6,7, 8,9, 12,13, 14,15, 16,17, 20,21
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db 22,23, 24,25, 28,29, 30,31, 32,33, 36,37, 38,39, 40,41
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db 44,45, 46,47, 48,49, 52,53, 54,55, 56,57, 60,61, 62,63
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times 16 db 0xff ; align to 64
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perm_uv:
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db 0,1, 4,5, 10,11, 16,17, 20,21, 26,27, 32,33, 36,37
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db 42,43, 48,49, 52,53, 58,59
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times 8 db 0xff ; align to 32
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db 2,3, 8,9, 12,13, 18,19, 24,25, 28,29, 34,35, 40,41
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db 44,45, 50,51, 56,57, 60,61
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times 8 db 0xff ; align to 32
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; for AVX2 version only
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v210_luma_permute: dd 0,1,2,4,5,6,7,7 ; 32-byte alignment required
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v210_chroma_shuf2: db 0,1,2,3,4,5,8,9,10,11,12,13,-1,-1,-1,-1
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v210_luma_shuf_avx2: db 0,1,4,5,6,7,8,9,12,13,14,15,-1,-1,-1,-1
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v210_chroma_shuf_avx2: db 0,1,4,5,10,11,-1,-1,2,3,8,9,12,13,-1,-1
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v210_mult: dw 64,4,64,4,64,4,64,4
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v210_luma_shuf: db 8,9,0,1,2,3,12,13,4,5,6,7,-1,-1,-1,-1
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v210_chroma_shuf: db 0,1,8,9,6,7,-1,-1,2,3,4,5,12,13,-1,-1
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shift: times 4 dw 6, 2
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kmask: dw 0x5555, 0xaaaa
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SECTION .text
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%macro v210_planar_unpack 1
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; v210_planar_unpack(const uint32_t *src, uint16_t *y, uint16_t *u, uint16_t *v, int width)
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cglobal v210_planar_unpack_%1, 5, 5, 6 + 2 * cpuflag(avx2), src, y, u, v, w
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movsxdifnidn wq, wd
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lea yq, [yq+2*wq]
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add uq, wq
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add vq, wq
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neg wq
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VBROADCASTI128 m3, [v210_mult]
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%if cpuflag(avx2)
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VBROADCASTI128 m4, [v210_luma_shuf_avx2]
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VBROADCASTI128 m5, [v210_chroma_shuf_avx2]
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mova m6, [v210_luma_permute]
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VBROADCASTI128 m7, [v210_chroma_shuf2]
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%else
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VBROADCASTI128 m4, [v210_luma_shuf]
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VBROADCASTI128 m5, [v210_chroma_shuf]
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%endif
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.loop:
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%ifidn %1, unaligned
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movu m0, [srcq] ; yB v5 yA u5 y9 v4 y8 u4 y7 v3 y6 u3 y5 v2 y4 u2 y3 v1 y2 u1 y1 v0 y0 u0
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%else
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mova m0, [srcq]
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%endif
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pmullw m1, m0, m3 ; shifts the 1st and 3rd sample of each dword into the high 10 bits of each word
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pslld m0, 12 ; shifts the 2nd sample of each dword into the high 10 bits of each dword
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psrlw m1, 6 ; shifts the 1st and 3rd samples back into the low 10 bits
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psrld m0, 22 ; shifts the 2nd sample back into the low 10 bits of each dword
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%if cpuflag(avx2)
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vpblendd m2, m1, m0, 0x55 ; merge the odd dwords from m0 and even from m1 ; yB yA 00 y9 y8 y7 00 y6 y5 y4 00 y3 y2 y1 00 y0
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pshufb m2, m4 ; 00 00 yB yA y9 y8 y7 y6 00 00 y5 y4 y3 y2 y1 y0
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vpermd m2, m6, m2 ; 00 00 00 00 yB yA y9 y8 y7 y6 y5 y4 y3 y2 y1 y0
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movu [yq+2*wq], m2
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vpblendd m1, m1, m0, 0xaa ; merge the even dwords from m0 and odd from m1 ; 00 v5 u5 v4 00 u4 v3 u3 00 v2 u2 v1 00 u1 v0 u0
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pshufb m1, m5 ; 00 v5 v4 v3 00 u5 u4 u3 00 v2 v1 v0 00 u2 u1 u0
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vpermq m1, m1, 0xd8 ; 00 v5 v4 v3 00 v2 v1 v0 00 u5 u4 u3 00 u2 u1 u0
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pshufb m1, m7 ; 00 00 v5 v4 v3 v2 v1 v0 00 00 u5 u4 u3 u2 u1 u0
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movu [uq+wq], xm1
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vextracti128 [vq+wq], m1, 1
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%else
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shufps m2, m1, m0, 0x8d ; 00 y9 00 y6 yB yA y8 y7 00 y3 00 y0 y5 y4 y2 y1
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pshufb m2, m4 ; 00 00 yB yA y9 y8 y7 y6 00 00 y5 y4 y3 y2 y1 y0
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movu [yq+2*wq], m2
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shufps m1, m0, 0xd8 ; 00 v5 00 u4 u5 v4 v3 u3 00 v2 00 u1 u2 v1 v0 u0
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pshufb m1, m5 ; 00 v5 v4 v3 00 u5 u4 u3 00 v2 v1 v0 00 u2 u1 u0
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movq [uq+wq], m1
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movhps [vq+wq], m1
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%endif
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add srcq, mmsize
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add wq, (mmsize*3)/8
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jl .loop
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RET
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%endmacro
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INIT_XMM ssse3
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v210_planar_unpack unaligned
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%if HAVE_AVX_EXTERNAL
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INIT_XMM avx
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v210_planar_unpack unaligned
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%endif
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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v210_planar_unpack unaligned
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%endif
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INIT_XMM ssse3
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v210_planar_unpack aligned
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%if HAVE_AVX_EXTERNAL
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INIT_XMM avx
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v210_planar_unpack aligned
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%endif
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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v210_planar_unpack aligned
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%endif
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%if HAVE_AVX512ICL_EXTERNAL
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INIT_ZMM avx512icl
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cglobal v210_planar_unpack, 5, 5, 6, src, y, u, v, w
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movsxdifnidn wq, wd
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lea yq, [yq+2*wq]
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add uq, wq
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add vq, wq
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neg wq
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kmovw k1, [kmask] ; odd dword mask
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kmovw k2, [kmask+2] ; even dword mask
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VBROADCASTI128 m0, [shift]
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mova m1, [perm_y]
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mova m2, [perm_uv]
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.loop:
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movu m3, [srcq]
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vpsllvw m4, m3, m0
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pslld m5, m3, 12
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psrlw m4, 6
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psrld m5, 22
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vpblendmd m3{k1}, m4, m5
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vpermb m3, m1, m3 ; could use vpcompressw
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movu [yq+2*wq], m3
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vpblendmd m5{k2}, m4, m5
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vpermb m5, m2, m5
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movu [uq+wq], ym5
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vextracti32x8 [vq+wq], zm5, 1
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add srcq, mmsize
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add wq, (mmsize*3)/8
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jl .loop
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RET
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%endif
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