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55e9c758f0
According to the VVC specification (section 8.5.1), the maximum width/height of a subblock passed for DMVR SAD is 16. This along with previous constraint requiring width * height >= 128 means that 8x16, 16x8, and 16x16 are the only allowed sizes. This re-labels vvc_sad_16_128 to vvc_sad_16 to reflect this and adds a comment about the block size constraints. There's no functionality change.
135 lines
3.8 KiB
NASM
135 lines
3.8 KiB
NASM
; /*
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; * Provide SIMD DMVR SAD functions for VVC decoding
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; *
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; * Copyright (c) 2024 Stone Chen
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; *
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; * This file is part of FFmpeg.
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; *
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; * FFmpeg is free software; you can redistribute it and/or
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; * modify it under the terms of the GNU Lesser General Public
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; * License as published by the Free Software Foundation; either
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; * version 2.1 of the License, or (at your option) any later version.
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; *
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; * FFmpeg is distributed in the hope that it will be useful,
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; * but WITHOUT ANY WARRANTY; without even the implied warranty of
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; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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; * Lesser General Public License for more details.
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; *
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; * You should have received a copy of the GNU Lesser General Public
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; * License along with FFmpeg; if not, write to the Free Software
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; * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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; */
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%include "libavutil/x86/x86util.asm"
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%define MAX_PB_SIZE 128
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%define ROWS 2
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SECTION_RODATA
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pw_1: times 2 dw 1
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; DMVR SAD is only calculated on even rows to reduce complexity
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; Additionally the only valid sizes are 8x16, 16x8, and 16x16
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SECTION .text
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%macro MIN_MAX_SAD 3
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pminuw %3, %2, %1
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pmaxuw %1, %2, %1
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psubusw %1, %1, %3
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%endmacro
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%macro HORIZ_ADD 3 ; xm0, xm1, m1
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vextracti128 %1, %3, q0001 ; 3 2 1 0
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paddd %1, %2 ; xm0 (7 + 3) (6 + 2) (5 + 1) (4 + 0)
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pshufd %2, %1, q0032 ; xm1 - - (7 + 3) (6 + 2)
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paddd %1, %1, %2 ; xm0 _ _ (5 1 7 3) (4 0 6 2)
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pshufd %2, %1, q0001 ; xm1 _ _ (5 1 7 3) (5 1 7 3)
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paddd %1, %1, %2 ; (01234567)
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%endmacro
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%if ARCH_X86_64
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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cglobal vvc_sad, 6, 9, 5, src1, src2, dx, dy, block_w, block_h, off1, off2, row_idx
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movsxdifnidn dxq, dxd
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movsxdifnidn dyq, dyd
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sub dxq, 2
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sub dyq, 2
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mov off1q, 2
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mov off2q, 2
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add off1q, dyq
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sub off2q, dyq
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shl off1q, 7
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shl off2q, 7
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add off1q, dxq
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sub off2q, dxq
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lea src1q, [src1q + off1q * 2 + 2 * 2]
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lea src2q, [src2q + off2q * 2 + 2 * 2]
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pxor m3, m3
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vpbroadcastd m4, [pw_1]
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cmp block_wd, 16
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je vvc_sad_16
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vvc_sad_8:
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.loop_height:
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movu xm0, [src1q]
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vinserti128 m0, m0, [src1q + MAX_PB_SIZE * ROWS * 2], 1
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movu xm1, [src2q]
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vinserti128 m1, m1, [src2q + MAX_PB_SIZE * ROWS * 2], 1
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MIN_MAX_SAD m1, m0, m2
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pmaddwd m1, m4
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paddd m3, m1
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add src1q, 2 * MAX_PB_SIZE * ROWS * 2
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add src2q, 2 * MAX_PB_SIZE * ROWS * 2
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sub block_hd, 4
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jg .loop_height
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HORIZ_ADD xm0, xm3, m3
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movd eax, xm0
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RET
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vvc_sad_16:
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sar block_wd, 4
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.loop_height:
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mov off1q, src1q
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mov off2q, src2q
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mov row_idxd, block_wd
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.loop_width:
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movu m0, [src1q]
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movu m1, [src2q]
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MIN_MAX_SAD m1, m0, m2
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pmaddwd m1, m4
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paddd m3, m1
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add src1q, 32
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add src2q, 32
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dec row_idxd
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jg .loop_width
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lea src1q, [off1q + ROWS * MAX_PB_SIZE * 2]
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lea src2q, [off2q + ROWS * MAX_PB_SIZE * 2]
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sub block_hd, 2
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jg .loop_height
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HORIZ_ADD xm0, xm3, m3
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movd eax, xm0
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RET
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%endif
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%endif
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