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mirror of https://github.com/FFmpeg/FFmpeg.git synced 2024-12-23 12:43:46 +02:00
FFmpeg/libavutil/x86
Lynne 119a3f7e8d
lavu/x86: add FFT assembly
This commit adds a pure x86 assembly SIMD version of the FFT in libavutil/tx.
The design of this pure assembly FFT is pretty unconventional.

On the lowest level, instead of splitting the complex numbers into
real and imaginary parts, we keep complex numbers together but split
them in terms of parity. This saves a number of shuffles in each transform,
but more importantly, it splits each transform into two independent
paths, which we process using separate registers in parallel.
This allows us to keep all units saturated and lets us use all available
registers to avoid dependencies.
Moreover, it allows us to double the granularity of our per-load permutation,
skipping many expensive lookups and allowing us to use just 4 loads per register,
rather than 8, or in case FMA3 (and by extension, AVX2), use the vgatherdpd
instruction, which is at least as fast as 4 separate loads on old hardware,
and quite a bit faster on modern CPUs).

Higher up, we go for a bottom-up construction of large transforms, foregoing
the traditional per-transform call-return recursion chains. Instead, we always
start at the bottom-most basis transform (in this case, a 32-point transform),
and continue constructing larger and larger transforms until we return to the
top-most transform.
This way, we only touch the stack 3 times per a complete target transform:
once for the 1/2 length transform and two times for the 1/4 length transform.

The combination algorithm we use is a standard Split-Radix algorithm,
as used in our C code. Although a version with less operations exists
(Steven G. Johnson and Matteo Frigo's "A modified split-radix FFT with fewer
arithmetic operations", IEEE Trans. Signal Process. 55 (1), 111–119 (2007),
which is the one FFTW uses), it only has 2% less operations and requires at least 4x
the binary code (due to it needing 4 different paths to do a single transform).
That version also has other issues which prevent it from being implemented
with SIMD code as efficiently, which makes it lose the marginal gains it offered,
and cannot be performed bottom-up, requiring many recursive call-return chains,
whose overhead adds up.

We go through a lot of effort to minimize load/stores by keeping as much in
registers in between construcring transforms. This saves us around 32 cycles,
on paper, but in reality a lot more due to load/store aliasing (a load from a
memory location cannot be issued while there's a store pending, and there are
only so many (2 for Zen 3) load/store units in a CPU).
Also, we interleave coefficients during the last stage to save on a store+load
per register.

Each of the smallest, basis transforms (4, 8 and 16-point in our case)
has been extremely optimized. Our 8-point transform is barely 20 instructions
in total, beating our old implementation 8-point transform by 1 instruction.
Our 2x8-point transform is 23 instructions, beating our old implementation by
6 instruction and needing 50% less cycles. Our 16-point transform's combination
code takes slightly more instructions than our old implementation, but makes up
for it by requiring a lot less arithmetic operations.

Overall, the transform was optimized for the timings of Zen 3, which at the
time of writing has the most IPC from all documented CPUs. Shuffles were
preferred over arithmetic operations due to their 1/0.5 latency/throughput.

On average, this code is 30% faster than our old libavcodec implementation.
It's able to trade blows with the previously-untouchable FFTW on small transforms,
and due to its tiny size and better prediction, outdoes FFTW on larger transforms
by 11% on the largest currently supported size.
2021-04-24 17:19:18 +02:00
..
asm.h
bswap.h libavutil: x86: Include stdlib.h before using _byteswap_ulong 2020-01-23 18:30:26 +02:00
cpu.c lavu/x86/cpu: Fix aesni detection 2018-07-19 20:17:44 +02:00
cpu.h Merge commit '4cf84e254ae75b524e1cacae499a97d7cc9e5906' 2018-02-11 23:08:48 -03:00
cpuid.asm
emms.asm
emms.h
fixed_dsp_init.c
fixed_dsp.asm
float_dsp_init.c x86/float_dsp: add ff_vector_dmul_{sse2,avx} 2018-09-14 12:54:42 -03:00
float_dsp.asm x86/float_dsp: add ff_vector_dmul_{sse2,avx} 2018-09-14 12:54:42 -03:00
imgutils_init.c
imgutils.asm
intmath.h
intreadwrite.h
lls_init.c Include attributes.h directly 2021-04-19 14:34:10 +02:00
lls.asm
Makefile lavu/x86: add FFT assembly 2021-04-24 17:19:18 +02:00
pixelutils_init.c x86/pixelutils: don't use the AVX2 functions on CPUs known to be slow with them 2018-07-31 22:14:53 -03:00
pixelutils.asm x86/pixelutils: add missing preprocessor wrapper to the AVX2 functions 2018-07-31 22:14:42 -03:00
pixelutils.h
timer.h
tx_float_init.c lavu/x86: add FFT assembly 2021-04-24 17:19:18 +02:00
tx_float.asm lavu/x86: add FFT assembly 2021-04-24 17:19:18 +02:00
w64xmmtest.h
x86inc.asm avutil/x86inc: fix warnings when assembling with Nasm 2.15 2020-07-12 11:30:23 -03:00
x86util.asm